HD64F2623FA20J Renesas Electronics America, HD64F2623FA20J Datasheet - Page 185

IC H8S MCU FLASH 256K 100-QFP

HD64F2623FA20J

Manufacturer Part Number
HD64F2623FA20J
Description
IC H8S MCU FLASH 256K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2623FA20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
2.2.50 (1)
PUSH (PUSH data)
Operation
Rn
Assembly-Language Format
PUSH.W Rn
Operand Size
Word
Description
This instruction saves data from a 16-bit register Rn onto the stack, tests the saved data, and sets
condition-code flags according to the result.
Available Registers
Rn: R0 to R7, E0 to E7
Operand Format and Number of States Required for Execution
Notes
1. PUSH.W Rn is identical to MOV.W Rn, @–SP.
2. When PUSH.W R7 or PUSH.W E7 is executed, the value saved on the stack is the R7 or E7
Addressing
value after effective address calculation (after ER7 is decremented by 2).
Mode
@–SP
PUSH (W)
Mnemonic
PUSH.W
Operands
Rn
1st byte
6
D
Condition Code
H: Previous value remains unchanged.
N: Set to 1 if the transferred data is negative;
Z: Set to 1 if the transferred data is zero;
V: Always cleared to 0.
C: Previous value remains unchanged.
2nd byte
F
Instruction Format
otherwise cleared to 0.
otherwise cleared to 0.
Rev. 4.00 Feb 24, 2006 page 169 of 322
I
rn
UI H
Section 2 Instruction Descriptions
3rd byte
U
N
Push Data on Stack
4th byte
REJ09B0139-0400
Z
V
0
States
No. of
C
3

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