HD64F3664FY Renesas Electronics America, HD64F3664FY Datasheet - Page 277

IC H8 MCU FLASH 32K 48QFP

HD64F3664FY

Manufacturer Part Number
HD64F3664FY
Description
IC H8 MCU FLASH 32K 48QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet

Specifications of HD64F3664FY

Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
I²C, SCI
Peripherals
PWM, WDT
Number Of I /o
29
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
48-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Bit
2
1
0
Bit Name
AAS
ADZ
ACKB
Initial
Value
0
0
0
R/W
R/W
R/W
R/W
Description
Slave Address Recognition Flag
[Setting condition]
When the slave address or general call address is
detected in slave receive mode and FS = 0.
[Clearing conditions]
General Call Address Recognition Flag
This bit is valid in I
[Setting condition]
When the general call address is detected in slave
receive mode and FSX = 0 or FS = 0.
[Clearing conditions]
Acknowledge Bit
In transmit mode, the acknowledge data that are
returned by the receive device is loaded. In receive
mode, the acknowledge data originally specified to this
bit is sent to the transmit device, after receiving data.
When this bit is read, the loaded value (return value
from the receive device) is read at transmission and the
specified value is read at reception.
When ICDR data is written (transmit mode) or read
(receive mode)
When 0 is written in AAS after reading AAS = 1
In master mode
When ICDR data is written (transmit mode) or read
(receive mode)
When 0 is written in ADZ after reading ADZ = 1
In master mode
2
Rev. 6.00 Mar. 24, 2006 Page 247 of 412
C bus format slave receive mode.
Section 15 I
2
C Bus Interface (IIC)
REJ09B0142-0600

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