M37544G2AGP Renesas Electronics America, M37544G2AGP Datasheet - Page 61

• Manufacturer Part Number: M37544G2AGP
• Description: MCU 2/5V 8K 32-LQFP
• Manufacturer: Renesas Electronics America
• Series: 740/38000r

Specifications of M37544G2AGP

• Core Processor: 740
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SIO, UART/USART
• Peripherals: WDT
• Number Of I /o: 25
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: QzROM
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Rev.1.04
REJ03B0012-0104Z
7544 Group
APPENDIX
NOTES ON PROGRAMMING
1. Processor Status Register
(1) Initializing of processor status register
Flags which affect program execution must be initialized after a re-
set.
In particular, it is essential to initialize the T and D flags because
they have an important effect on calculations.
<Reason>
After a reset, the contents of the processor status register (PS) are
undefined except for the I flag which is “1”.
Fig. 1 Initialization of processor status register
(2) How to reference the processor status register
To reference the contents of the processor status register (PS), ex-
ecute the PHP instruction once then read the contents of (S+1). If
necessary, execute the PLP instruction to return the PS to its origi-
nal status.
A NOP instruction should be executed after every PLP instruction.
Fig. 3 Stack memory contents after PHP instruction execution
Fig. 2 Sequence of PLP instruction execution
2004.06.08
(S)+1
(S)
PLP instruction execution
Initializing of flags
Main program
page 59 of 66
Reset
Stored PS
NOP
2. Decimal calculations
(1) Execution of decimal calculations
The ADC and SBC are the only instructions which will yield proper
decimal notation, set the decimal mode flag (D) to “1” with the
SED instruction. After executing the ADC or SBC instruction, ex-
ecute another instruction before executing the SEC, CLC, or CLD
instruction.
(2) Notes on status flag in decimal mode
When decimal mode is selected, the values of three of the flags in
the status register (the N, V, and Z flags) are invalid after a ADC or
SBC instruction is executed.
The carry flag (C) is set to “1” if a carry is generated as a result of
the calculation, or is cleared to “0” if a borrow is generated. To de-
termine whether a calculation has generated a carry, the C flag
must be initialized to “0” before each calculation. To check for a
borrow, the C flag must be initialized to “1” before each calcula-
tion.
Fig. 4 Status flag at decimal calculations
3. JMP instruction
When using the JMP instruction in indirect addressing mode, do
not specify the last address on a page as an indirect address.
4. BRK instruction
(1) Interrupt priority level
When the BRK instruction is executed with the following condi-
tions satisfied, the interrupt execution is started from the address
of interrupt vector which has the highest priority.
• Interrupt request bit and interrupt enable bit are set to “1”.
• Interrupt disable flag (I) is set to “1” to disable interrupt.
5. Multiplication and Division Instructions
(1) The index X mode (T) and the decimal mode (D) flags do not
(2) The execution of these instructions does not change the con-
affect the MUL and DIV instruction.
tents of the processor status register.
SEC, CLC, or CLD instruction
ADC or SBC instruction
Set D flag to “1”
NOP instruction