M30622F8PGP#U9C Renesas Electronics America, M30622F8PGP#U9C Datasheet - Page 409

• Manufacturer Part Number: M30622F8PGP#U9C
• Description: IC M16C/62P MCU FLASH 64K 100QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M30622F8PGP#U9C

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: I²C, IEBus, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• For Use With: R0K33062PS001BE - R0K33062P STARTER KITR0K33062PS000BE - KIT EVAL STARTER FOR M16C/62P
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Rev.
REVISION HISTORY
Date
Page
164,
100
103
104
105
109
115
117
117
122
124
128
128
130
132
134
137
146
163
165
169
170
171
179
184
187
203
205
206
207
88
96
99
Figure 1.11.9 is partly revised.
WDTS Register in Figure 1.12.2 is partly revised.
Figure 1.13.2 is partly revised.
Figure 1.13.3 is partly revised.
Figure 1.13.5 is partly revised.
Table 1.13.3 is partly revised.
Explanation of “DMA Enable” is partly revised.
Figure 1.14.3 is partly revised.
Table 1.14.5 is partly revised.
Explanation of “Counter Initialization by Two-Phase Pulse Signal
Processing” is partly revised.
Figure 1.14.10 is partly revised.
Figure 1.14.14 is partly revised.
Figure 1.14.15 is partly revised.
Figure 1.15.3 is partly revised.
Figure 1.15.7 is partly revised.
Figure 1.15.8 is partly revised.
Figure 1.16.1 is partly revised.
Figure 1.16.3 is partly revised.
Note 7 is added to TAi, TAi1 Register in Figure 1.16.5.
Figure 1.16.8 is partly revised.
UiSMR2 Register in Figure 1.17.7 is partly revised.
Figure 1.20.1 is partly revised.
Table 1.20.2 and Table 1.20.3 are partly revised.
Figure 1.20.4 is partly revised.
Explanation of “Arbitration” is partly revised.
Explanation of “Transfer Clock” is partly revised.
Explanation of “ACK and NACK” is partly revised.
Explanation of “Special Mode 4 (SIM Mode)” is partly revised.
Table 1.20.9 is partly revised.
Figure 1.21.1 is partly revised.
Figure 1.21.4 is partly revised.
Explanation of “External Operation Amp Connection Mode” is partly
revised.
Explanation of “Caution of Using A/D Converter” is partly revised.
Figure 1.22.11 is partly revised
Table 1.23.1 is partly revised.
Figure 1.23.3 is partly revised.
M16C/62P Group (M16C/62P, M16C/62PT) Hardware Manual
C - 2
Description
Summary