AD548KNZ Analog Devices Inc, AD548KNZ Datasheet - Page 8

• Manufacturer Part Number: AD548KNZ
• Description: IC OPAMP GP 1MHZ LP PREC 8DIP
• Manufacturer: Analog Devices Inc
• Type: General Purpose Amplifierr

Specifications of AD548KNZ

• Slew Rate: 1.8 V/µs
• Amplifier Type: General Purpose
• Number Of Circuits: 1
• Gain Bandwidth Product: 1MHz
• Current - Input Bias: 30pA
• Voltage - Input Offset: 300µV
• Current - Supply: 170µA
• Current - Output / Channel: 15mA
• Voltage - Supply, Single/dual (±): ±4.5 V ~ 18 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Package / Case: 8-DIP (0.300", 7.62mm)
• Op Amp Type: Precision
• No. Of Amplifiers: 1
• Bandwidth: 1MHz
• Supply Voltage Range: ± 4.5V To ± 18V
• Amplifier Case Style: DIP
• No. Of Pins: 8
• Operating Temperature Range: 0°C To +70°C
• Rail/rail I/o Type: No
• Number Of Elements: 1
• Unity Gain Bandwidth Product: 1MHz
• Common Mode Rejection Ratio: 76dB
• Input Offset Voltage: 500uV
• Input Bias Current: 15pA
• Single Supply Voltage (typ): Not RequiredV
• Dual Supply Voltage (typ): ±5/±9/±12/±15V
• Power Dissipation: 500mW
• Voltage Gain In Db: 116.9dB
• Power Supply Requirement: Dual
• Shut Down Feature: No
• Single Supply Voltage (min): Not RequiredV
• Single Supply Voltage (max): Not RequiredV
• Dual Supply Voltage (min): ±4.5V
• Dual Supply Voltage (max): ±18V
• Technology: BiFET
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 8
• Package Type: PDIP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Output Type: -
• -3db Bandwidth: -
• Lead Free Status / Rohs Status: Compliant

AD548
INPUT PROTECTION
The AD548 is guaranteed to withstand input voltages equal to
the power supply potential. Exceeding the negative supply volt-
age on either input will forward bias the substrate junction of
the chip. The induced current may destroy the amplifier due to
excess heat.
Input protection is required in applications such as a flame
detector in a gas chromatograph, where a very high potential
may be applied to the input terminals during a sensor fault
condition. Figure 3 shows a simple current limiting scheme that
can be used. R
mum overload current is 1.0 mA (l00 kΩ for a 100 V overload,
for example).
Exceeding the negative common-mode range on either input
terminal causes a phase reversal at the output, forcing the
amplifier output to the corresponding high or low state. Exceed-
ing the negative common-mode on both inputs simultaneously
forces the output high. Exceeding the positive common-mode
range on a single input does not cause a phase reversal, but if
both inputs exceed the limit the output will be forced high. In
all cases, normal amplifier operation is resumed when input
voltages are brought back within the common-mode range.
D/A CONVERTER OUTPUT BUFFER
The circuit in Figure 4 shows the AD548 and AD7545 12-bit
CMOS D/A converter in a unipolar binary configuration. V
will be equal to V
digital word. V
adjusting R
and clean dynamics make it an attractive low power output buffer.
The input offset voltage of the AD548 output amplifier results
in an output error voltage. This error voltage equals the input
offset voltage of the op amp times the noise gain of the amplifier.
Figure 2. Board Layout for Guarding Inputs
Figure 3. Input Protection of IV Converter
IN
. The AD548’s low input offset voltage, low drift,
PROTECT
REF
REF
sets the full scale. Overall gain is trimmed by
attenuated by a factor depending on the
should be chosen such that the maxi-
OUT
–8–
That is:
R
the DAC. R
value of R
the offset error voltage at the amplifier’s output. An output
amplifier with a sub millivolt input offset voltage is needed to
preserve the linearity of the DAC’s transfer function.
The AD548 in this configuration provides a 700 kHz small
signal bandwidth and 1.8 V/µs typical slew rate. The 33 pF
capacitor across the feedback resistor optimizes the circuit’s
response. The oscilloscope charts in Figures 5 and 6 show small
and large signal outputs of the circuit in Figure 4. Upper traces
show the input signal V
voltage with the DAC’s digital input set to all 1s. The AD548
settles to ± 0.01% for a 20 V input step in 14 µs.
Figure 6. Response to ± 100 mV p-p Reference Square Wave
Figure 5. Response to ± 20 V p-p Reference Square Wave
FB
is the feedback resistor for the op amp, which is internal to
V
Figure 4. AD548 Used as DAC Output Amplifier
OS
O
Output =V
O
is code dependent. This has the effect of changing
is the DAC’s R-2R ladder output resistance. The
10
10
100
100
0%
0%
90
90
50mV
5V
OS
IN
Input 1+
. Lower traces are the resulting output
200mV
20V



R
R
FB
O



2µS
5µS
REV. D