MAX6793TPLD2+ Maxim Integrated Products, MAX6793TPLD2+ Datasheet - Page 20

• Manufacturer Part Number: MAX6793TPLD2+
• Description: IC REG LIN W/SPR VSR 20-TQFN
• Manufacturer: Maxim Integrated Products
• Type: Regulator/Supervisorr

Specifications of MAX6793TPLD2+

• Number Of Voltages Monitored: 1
• Output: Open Drain or Open Collector
• Reset: Active Low
• Reset Timeout: 8.75 ms Minimum
• Voltage - Threshold: 4.625V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 20-TQFN Exposed Pad
• Number Of Outputs: 2
• Polarity: Positive
• Input Voltage Max: 72 V
• Output Voltage: 1.8 V to 11 V, 5 V
• Output Type: Adjustable, Fixed
• Dropout Voltage (max): 1.8 V at 150 mA
• Output Current: 150 mA
• Line Regulation: 1 %
• Load Regulation: 1.5 %
• Maximum Power Dissipation: 2.6667 W
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

High-Voltage, Micropower, Single/Dual Linear
Regulators with Supervisory Functions
Table 1. Preset Output Voltage and Reset
Threshold
Table 2. Preset Timeout Period
Table 3. ENABLE/ENABLE1 and HOLD Truth Table/State Table
20
Hold setup state
SUFFIX (_)
OPERATING
Turn-on state
Initial state
PART
Hold state
______________________________________________________________________________________
Off state
STATE
M
W
L
T
S
Z
Y
V
SUFFIX (_)
PART
D0
D1
D2
D3
D4
VOLTAGE (V)
ENABLE1/
OUTPUT
ENABLE
5.0
5.0
3.3
3.3
2.5
2.5
1.8
1.8
High
High
Low
Low
Low
RESET TIMEOUT PERIOD
High (floats
Don’t care
Don’t care
RESET THRESHOLD
HOLD
(NOMINAL)
high)
Low
Low
3.125ms
12.5ms
200ms
50ms
35µs
(NOMINAL)
4.625
4.375
3.053
2.888
2.313
2.188
1.665
1.575
REGULATOR 1
OUTPUT
Off
On
On
On
Off
ENABLE/ENABLE1 is pulled to GND through internal pulldown.
OUT/OUT1 is disabled.
ENABLE/ENABLE1 is externally driven high turning OUT/OUT1
on. HOLD is pulled up to OUT/OUT1.
HOLD is externally pulled low while ENABLE/ENABLE1
remains high, and the regulator latches on.
ENABLE/ENABLE1 is driven low (or allowed to float low by an
internal pulldown). HOLD remains externally pulled low
keeping OUT/OUT1 on.
HOLD i s d r i ven hi g h ( or al l ow ed to fl oat hi g h b y the i nter nal p ul l up )
w hi l e E N ABLE /E N ABLE 1 i s l ow . OUT/OUT1 i s tur ned off and
E N ABLE /E N ABLE 1 and HOLD l og i c r etur ns to the i ni ti al state.
Use the following formulas to determine the high/low
threshold levels and the hysteresis:
V
R8)]
V
R8)]
where V
age rising and V
tored voltage falling.
PROCESS: BiCMOS
H-L
HYS
= V
= V
L-H
PFI
PFI
V
L-H
x (1 + R5 / R6 ) + (V
is the threshold level for the monitored volt-
x (R5 / R7 ) - (V
= V
H-L
PFI
is the threshold level for the moni-
x (1 + R5 / R6 +R5 / R7)
COMMENT
Chip Information
PFI
PFI
- V
- V
TERM
TERM
) [R5 / (R7 +
) [R5 / (R7 +