XR17D154IV-F Exar Corporation, XR17D154IV-F Datasheet - Page 22

IC UART PCI BUS QUAD 144LQFP

XR17D154IV-F

Manufacturer Part Number
XR17D154IV-F
Description
IC UART PCI BUS QUAD 144LQFP
Manufacturer
Exar Corporation
Type
IrDA or RS- 485r
Datasheet

Specifications of XR17D154IV-F

Number Of Channels
4, QUART
Package / Case
144-LQFP
Features
*
Fifo's
64 Byte
Protocol
RS485
Voltage - Supply
3.3V, 5V
With Auto Flow Control
Yes
With Irda Encoder/decoder
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
Mounting Type
Surface Mount
Data Rate
6.25 Mbps
Supply Voltage (max)
5.5 V
Supply Voltage (min)
3 V
Supply Current
4 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V or 5 V
No. Of Channels
4
Uart Features
Tx/Rx FIFO Counters
Supply Voltage Range
3V To 5.5V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
1016-1290

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XR17D154IV-F
Manufacturer:
ADI
Quantity:
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Part Number:
XR17D154IV-F
Manufacturer:
Exar Corporation
Quantity:
10 000
Company:
Part Number:
XR17D154IV-F
Quantity:
15
XR17D154
UNIVERSAL (3.3V AND 5V) PCI BUS QUAD UART
MPIOLVL [7:0] - (default 0x00)
Output pin level control and input level status. The status of the input pin(s) is read on this register and output
pins are controlled on this register. A logic 0 (default) sets the output to low and a logic 1 sets the output pin to
high. The MPIO interrupt will clear upon reading this register.
MPIO3T [7:0] - (default 0x00)
Output pin tri-state control. A logic 0 (default) sets the output to active level per register MPIOBIT settling, a
logic 1 sets the output pin to tri-state.
MPIOINV [7:0] - (default 0x00)
Input inversion control. A logic 0 (default) does not invert the input pin logic. A logic 1 inverts the input logic
level.
MPIOSEL [7:0] - (default 0xFF)
Multipurpose input/output pin select. This register defines the functions of the pins. A logic 1 (default) defines
the pin for input and a logic 0 for output.
MPIO7
MPIO7
Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
MPIO7
Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
MPIO7
Multipurpose Input Signal Inversion Enable
MPIO6
MPIO6
Multipurpose Input/Output Selection
Multipurpose Output Level Control
MPIO6
MPIO6
Multipurpose Output 3-state Enable
MPIO5 MPIO4 MPIO3 MPIO2 MPIO1 MPIO0
MPIO5 MPIO4 MPIO3 MPIO2 MPIO1 MPIO0
MPIO5 MPIO4 MPIO3 MPIO2 MPIO1 MPIO0
MPIO5 MPIO4 MPIO3 MPIO2 MPIO1 MPIO0
MPIOLVL Register
MPIOSEL Register
MPIOINV Register
MPIO3T Register
22
xr
REV. 1.2.2

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