ALD1721GPAL Advanced Linear Devices Inc, ALD1721GPAL Datasheet - Page 4

• Manufacturer Part Number: ALD1721GPAL
• Description: IC OPAMP GP R-R CMOS 8PDIP
• Manufacturer: Advanced Linear Devices Inc

Specifications of ALD1721GPAL

• Amplifier Type: General Purpose
• Number Of Circuits: 1
• Output Type: Rail-to-Rail
• Slew Rate: 1 V/µs
• Gain Bandwidth Product: 1MHz
• Current - Input Bias: 0.01pA
• Voltage - Input Offset: 150µV
• Current - Supply: 110µA
• Current - Output / Channel: 1mA
• Voltage - Supply, Single/dual (±): 2 V ~ 10 V, ±1 V ~ 5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Package / Case: 8-DIP (0.300", 7.62mm)
• Common Mode Rejection Ratio (min): 83 dB
• Input Voltage Range (max): 5.3 V
• Input Voltage Range (min): - 0.3 V
• Input Offset Voltage: 0.15 mV
• Supply Current: 110 uA
• Maximum Power Dissipation: 0.6 mW
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• -3db Bandwidth: -
• Lead Free Status / Rohs Status: Details
• Other names: 1014-1089

Design & Operating Notes:
1. The ALD1721/ALD1721G CMOS operational amplifier uses a 3 gain
2. The ALD1721/ALD1721G has complementary p-channel and n-
3. The input bias and offset currents are essentially input protection
ALD1721/ALD1721G
stage architecture and an improved frequency compensation
scheme to achieve large voltage gain, high output driving capability,
and better frequency stability. The ALD1721/ALD1721G is internally
compensated for unity gain stability. This compensation produces a
clean single pole roll off in the gain characteristics while providing for
more than 70 degrees of phase margin at the unity gain frequency,
reducing or eliminating low levels of oscillation or ringing with many
types of loading conditions.
channel input differential stages connected in parallel to accomplish
rail to rail input common mode voltage range. With different ranges
of common mode input voltage, one or both of the two differential
stages is active. The transition between the two input stages takes
place at about 1.5V below the positive supply voltage. Input offset
voltage trimming on the ALD1721/ALD1721G is made when the
input voltage is symmetrical to the supply voltages, this internal
transition switching does not affect a variety of applications such as
an inverting amplifier or non-inverting amplifier with a gain larger
than 2.5 (5V operation), where the common mode voltage does not
make excursions above this switching point. If the operational
amplifier is connected as a unity gain buffer, and full input and/or
output rail to rail range is used, then provision should be made to
allow for slight input offset voltage variations. Likewise the output
has push-pull(source-sink) output stages working in tandem to
provide full (see note 4) rail to rail output. In addition, the source and
sink currents are designed to provide symmetrical drives to the load.
diode reverse bias leakage currents, and are typically less than
0.01pA at room temperature. This low input bias current assures
that the analog signal from the source will not be distorted by input
bias currents. Normally, this extremely high input impedance of
greater than 10
1000
500
400
300
200
100
100
10
0
1
10K
0
SUPPLY CURRENT AS A FUNCTION
INPUTS GROUNDED
OUTPUT UNLOADED
OPEN LOOP VOLTAGE GAIN AS A
FUNCTION OF LOAD RESISTANCE
14
1
would be limited by the source impedance which
OF SUPPLY VOLTAGE
T
A
SUPPLY VOLTAGE (V)
= -55 C
100K
LOAD RESISTANCE ( )
2
3
-25 C
+70 C
+25 C
TYPICAL PERFORMANCE CHARACTERISTICS
1M
4
V
T
+125 C
S
A
= 2.5V
= 25 C
5
10M
6
Advanced Linear Devices
4. The output stage consists of class AB complementary output drivers,
5. The ALD1721/ALD1721G operational amplifier has been designed
6. The ALD1721/ALD1721G, with its micropower operation, offers
7. The ALD1721/ALD1721G has an internal design architecture that
would limit the node impedance. However, for applications where
source impedance is also very high, it may be necessary to limit
noise and hum pickup through proper ground shielding.
capable of driving a low resistance load to either supply rail. The
output voltage swing is limited by the drain to source on-resistance
of the output transistors as determined by the bias circuitry, and the
value of the load resistor. When connected in the voltage follower
configuration, the oscillation resistant feature, combined with the rail
to rail input and output feature, makes an effective analog signal
buffer for medium to high source impedance sensors, transducers,
and other circuit networks.
to provide static discharge protection. Internally, the design has
been carefully implemented to minimize latch up. However, care
must be exercised when handling the device to avoid strong static
fields that may degrade a diode junction, causing increased input
leakage currents. The user is advised to power up the circuit before,
or simultaneously with any input voltages applied, and to limit input
voltages not to exceed 0.3V of the power supply voltage levels at all
times, including during power up and power down cycles.
benefits in reduced power supply requirements, less noise coupling
and current spikes, less thermally induced drift, better overall reli-
ability due to lower self heating, and lower input bias current. It
requires practically no warm up time as the chip junction heats up to
0.1 C or less above ambient temperature under most operating
conditions.
provides robust high temperature operation. Contact factory for
custom screening versions.
1000
0.01
0
7
6
5
4
3
2
1
100
1.0
0.1
COMMON MODE INPUT VOLTAGE RANGE
10
0
AS A FUNCTION OF SUPPLY VOLTAGE
-50
INPUT BIAS CURRENT AS A FUNCTION
T
1
A
-25
V
= 25 C
OF AMBIENT TEMPERATURE
S
= 2.5V
AMBIENT TEMPERATURE ( C)
2
SUPPLY VOLTAGE (V)
0
3
25
4
50
5
75
6
100
7
125
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