NCP5351DR2G ON Semiconductor, NCP5351DR2G Datasheet

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NCP5351DR2G

Manufacturer Part Number
NCP5351DR2G
Description
IC DRIVER MOSFET DUAL 4A 8SOIC
Manufacturer
ON Semiconductor
Type
High Side/Low Sider
Datasheet

Specifications of NCP5351DR2G

Configuration
High and Low Side, Synchronous
Input Type
Inverting and Non-Inverting
Delay Time
45ns
Current - Peak
4A
Number Of Configurations
1
Number Of Outputs
2
High Side Voltage - Max (bootstrap)
25V
Voltage - Supply
4.5 V ~ 6.3 V
Operating Temperature
-30°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (0.154", 3.90mm Width)
Rise Time
16 ns
Fall Time
21 ns
Supply Voltage (min)
- 0.3 V
Supply Current
1 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 30 C
Number Of Drivers
2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
NCP5351DR2GOS
NCP5351DR2GOS
NCP5351DR2GOSTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
NCP5351DR2G
Manufacturer:
ON Semiconductor
Quantity:
2
Part Number:
NCP5351DR2G
Manufacturer:
ON/安森美
Quantity:
20 000
NCP5351
4 A Synchronous Buck
Power MOSFET Driver
gates of both high−side and low−side Power MOSFETs in a
Synchronous Buck converter. The NCP5351 is an excellent
companion to multiphase controllers that do not have integrated gate
drivers, such as ON Semiconductor’s CS5323, CS5305 or CS5307.
This architecture provides a power supply designer the flexibility to
locate the gate drivers close to the MOSFETs.
switching losses in MOSFETs with large input capacitance. Optimized
internal, adaptive nonoverlap circuitry further reduces switching
losses by preventing simultaneous conduction of both MOSFETs.
voltages as high as 25 V. Both gate outputs can be driven low, and
supply current reduced to less than 25 mA, by applying a low logic
level to the Enable (EN) pin. An undervoltage lockout function
ensures that both driver outputs are low when the supply voltage is
low, and a thermal shutdown function provides the IC with
overtemperature protection.
available in a standard SO−8 package and thermally enhanced
DFN10.
Features
© Semiconductor Components Industries, LLC, 2010
February, 2010 − Rev. 13
The NCP5351 is a dual MOSFET gate driver optimized to drive the
The 4.0 A drive capability makes the NCP5351 ideal for minimizing
The floating top driver design can accommodate MOSFET drain
The NCP5351 is pin−to−pin compatible with the SC1205 and is
Voltage is Low
Turn On of High−Side MOSFET
4.0 A Peak Drive Current
Rise and Fall Times < 15 ns Typical into 6000 pF
Propagation Delay from Inputs to Outputs < 20 ns
Adaptive Nonoverlap Time Optimized for Large Power MOSFETs
Floating Top Driver Accommodates Applications Up to 25 V
Undervoltage Lockout to Prevent Switching when the Input
Thermal Shutdown Protection Against Overtemperature
< 1.0 mA Quiescent Current − Enabled
25 mA Quiescent Current − Disabled
Internal TG to DRN Pulldown Resistor Prevents HV Supply−Induced
Pb−Free Package is Available
1
See detailed ordering and shipping information in the package
dimensions section on page 12 of this data sheet.
8
(Note: Microdot may be in either location)
1
1
ORDERING INFORMATION
DRN
BST
N/C
CO
TG
DRN
A
L
Y
W
G
BST
CO
1
TG
PIN CONNECTIONS
http://onsemi.com
CASE 485C
MN SUFFIX
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
CASE 751
D SUFFIX
1
DFN10
SO−8
DFN10
SO−8
Publication Order Number:
8
8
1
PGND
BG
V
EN
DIAGRAMS
MARKING
10
1
S
GND
BG
N/C
V
EN
S
ALYW
5351
ALYWG
NCP5351/D
5351
G
G

Related parts for NCP5351DR2G

NCP5351DR2G Summary of contents

Page 1

... Power MOSFETs in a Synchronous Buck converter. The NCP5351 is an excellent companion to multiphase controllers that do not have integrated gate drivers, such as ON Semiconductor’s CS5323, CS5305 or CS5307. This architecture provides a power supply designer the flexibility to locate the gate drivers close to the MOSFETs. ...

Page 2

− + 4.25 V − EN Thermal Shutdown CO PGND Table 1. Input−Output Truth Table tpdl BG V −V TG DRN DRN Figure 2. ...

Page 3

PACKAGE PIN DESCRIPTION Pin Number SO−8 DFN−10 Pin Symbol 1 1 DRN BST − N − PGND − 10 ...

Page 4

MAXIMUM RATINGS − SO−8 Operating Junction Temperature Package Thermal Resistance: SO−8 Junction−to−Case, R qJC Junction−to−Ambient, R qJA Storage Temperature Range Lead Temperature Soldering: MSL Rating Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are ...

Page 5

ELECTRICAL CHARACTERISTICS (0°C < T Parameter DC OPERATING SPECIFICATIONS POWER SUPPLY V Quiescent Current, Operating Quiescent Current, Operat- V BST CO ing Quiescent Current, Non−Operat ing Undervoltage Lockout Start Threshold ...

Page 6

ELECTRICAL CHARACTERISTICS unless otherwise noted.) Parameter AC OPERATING SPECIFICATIONS HIGH−SIDE DRIVER Rise Time V BST Fall Time V BST Propagation Delay Time, V BST TG Going High (Nonoverlap Time) Propagation Delay Time, V BST TG Going Low LOW−SIDE DRIVER Rise ...

Page 7

CS1P CS3P 25 CS1N CS3N 26 CS2P CS4P 27 CS2N CS4N 28 ENABLE COMP 29 ID5 ID0 DRP ID1 V SGND 32 Figure 3. Application Diagram http://onsemi.com ...

Page 8

Theory Of Operation Enable Pin The Enable Pin (EN) is controlled by a logic level input. With a logic level high on the EN pin, the output states of the drivers are controlled by applying a logic level voltage to ...

Page 9

TYPICAL PERFORMANCE CHARACTERISTICS COM HOT −5.0 V Conditions: BST − DRN = 5.0 V; Room Temperature; Oscilloscope referenced to V Figure 5. Top Gate Sinking Current from 0.108 −5 −5.0 V Figure ...

Page 10

TYPICAL PERFORMANCE CHARACTERISTICS +5 1 − Conditions 5 Room Temperature; DRN = 0 V. Figure 9. Bottom Gate Sourcing Current into 0.108 Figure 10. Bottom Gate Sourcing ...

Page 11

TYPICAL PERFORMANCE CHARACTERISTICS +5 1.0 k Gated Pulse Burst (2) + − 4.0 V DRN Conditions 5.0 V; BST − DRN = 5 Room Temperature. Figure 14. Top Gate Rise ...

Page 12

... Figure 18. Bottom Gate and Top Gate Rise/Fall Time Test ORDERING INFORMATION Device NCP5351D NCP5351DG NCP5351DR2 NCP5351DR2G NCP5351MNR2 NCP5351MNR2G † For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. = 5.7 nF; ...

Page 13

... SOLDERING FOOTPRINT* E2 2.1746 10X 0.5651 10X 0.3008 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 13 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0 ...

Page 14

... *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “ ...

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