AD8319ACPZ-R7 Analog Devices Inc, AD8319ACPZ-R7 Datasheet - Page 10

• Manufacturer Part Number: AD8319ACPZ-R7
• Description: IC LOG DETECTOR/CTRL 8GHZ 8LFCSP
• Manufacturer: Analog Devices Inc

Specifications of AD8319ACPZ-R7

• Frequency: 1MHz ~ 8GHz
• Rf Type: RADAR, 802.11/Wi-Fi, 8.2.16/WiMax, Wireless LAN
• Input Range: -60dBm ~ -2dBm
• Accuracy: ±1dB
• Voltage - Supply: 3 V ~ 5.5 V
• Current - Supply: 22mA
• Package / Case: 8-VFDFN, CSP Exposed Pad
• No. Of Amplifiers: 1
• Dynamic Range, Decades: 45
• Response Time: 20ns
• Supply Voltage Range: 3V To 5.5V
• Amplifier Case Style: LFCSP
• No. Of Pins: 8
• Supply Current: 22mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: AD8319ACPZ-R7TR

AD8319
THEORY OF OPERATION
The AD8319 is a five-stage demodulating logarithmic amplifier,
specifically designed for use in RF measurement and power control
applications at frequencies up to 10 GHz. A block diagram is
shown in Figure 21. Sharing much of its design with the
logarithmic detector/controller, the AD8319 maintains tight
intercept variability vs. temperature over a 40 dB range. Additional
enhancements over the AD8318, such as reduced RF burst
response time of 6 ns to 10 ns, 22 mA supply current, and
board space requirements of only 2 mm × 3 mm add to the low
cost and high performance benefits found in the AD8319.
A fully differential design, using a proprietary, high speed
SiGe process, extends high frequency performance. Input INHI
receives the signal with a low frequency impedance of nominally
500 Ω in parallel with 0.7 pF. The maximum input with ±1 dB
log conformance error is typically 0 dBm (re: 50 Ω). The noise
spectral density referred to the input is 1.15 nV/√Hz, which is
equivalent to a voltage of 118 μV rms in a 10.5 GHz bandwidth
or a noise power of −66 dBm (re: 50 Ω). This noise spectral
density sets the lower limit of the dynamic range. However, the
low end accuracy of the AD8319 is enhanced by specially shaping
the demodulating transfer characteristic to partially compensate
for errors due to internal noise. The common pin, COMM,
provides a quality low impedance connection to the PCB
ground. The package paddle, which is internally connected
to the COMM pin, should also be grounded to the PCB to
reduce thermal impedance from the die to the PCB.
INLO
INHI
DET
DET
Figure 21. Block Diagram
GAIN
BIAS
VPSO
DET
SLOPE
COMM
DET
TADJ
V
I
V
I
AD8318
VSET
VOUT
CLPF
Rev. B | Page 10 of 20
The logarithmic function is approximated in a piecewise fashion
by five cascaded gain stages. (For a detailed explanation of the
logarithm approximation, refer to the
cells have a nominal voltage gain of 9 dB each and a 3 dB
bandwidth of 10.5 GHz. Using precision biasing, the gain is
stabilized over temperature and supply variations. The overall
dc gain is high due to the cascaded nature of the gain stages.
An offset compensation loop is included to correct for offsets
within the cascaded cells. At the output of each of the gain
stages, a square-law detector cell is used to rectify the signal.
The RF signal voltages are converted to a fluctuating differential
current having an average value that increases with signal level.
Along with the five gain stages and detector cells, an additional
detector is included at the input of the AD8319, providing a
40 dB dynamic range in total. After the detector currents are
summed and filtered, the following function is formed at the
summing node:
where:
I
V
V
the output voltage would be 0 V, if it were capable of going to 0 V).
D
IN
INTERCEPT
is the internally set detector current.
is the input signal voltage.
I
D
× log
is the intercept voltage (that is, when V
10
(V
IN
/V
INTERCEPT
)
AD8307
data sheet.) The
IN
= V
INTERCEPT
(1)
,