SI4731-B-EVB Silicon Laboratories Inc, SI4731-B-EVB Datasheet
SI4731-B-EVB
Specifications of SI4731-B-EVB
Related parts for SI4731-B-EVB
SI4731-B-EVB Summary of contents
Page 1
... AM/FM digital tuning No manual alignment necessary Programmable reference clock Volume control Programmable soft mute control RDS/RBDS processor (Si4731 only) 2-wire and 3-wire control interface 2.7 to 5.5 V supply voltage Firmware upgradeable Wide range of ferrite loop sticks and air loop antennas supported 0.55 mm 20-pin QFN package ...
Page 2
Si4730/31-A10 2 Rev. 1.0 ...
Page 3
... Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.3. FM Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 4.4. AM receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 4.5. Stereo Audio Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.6. De-emphasis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.7. Stereo DAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 4.8. Soft Mute . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.9. RDS/RBDS Processor (Si4731 Only 4.10. Tuning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.11. Seek . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.12. Reference Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.13. Control Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.14. GPO Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.15. Firmware Upgrades . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 4.16. Reset, Powerup, and Powerdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4 ...
Page 4
Si4730/31-A10 1. Electrical Specifications Table 1. Recommended Operating Conditions Parameter Supply Voltage Interface Supply Voltage Power Supply Power-Up Rise Time Interface Power Supply Power-Up Rise Time Ambient Temperature Note: All minimum and maximum specifications are guaranteed and apply across the ...
Page 5
Table 3. DC Characteristics (V = 2.7 to 5.5 V, VIO = 1 Parameter FM Mode Supply Current 1 Supply Current RDS Supply Current AM Mode Supply Current Supplies and Interface Interface Supply Current 2 ...
Page 6
Si4730/31-A10 Table 4. Reset Timing Characteristics (V = 2 1 Parameter RST Pulse Width and GPO1, GPO2/INT Setup to RST↑ GPO1, GPO2/INT Hold from RST↑ Important Notes: 1. When ...
Page 7
Table 5. 2-Wire Control Interface Characteristics (V = 2.7 to 5.5 V, VIO = 1 Parameter SCLK Frequency SCLK Low Time SCLK High Time ↓ SCLK Input to SDIO Setup (START) ↓ SCLK Input to ...
Page 8
Si4730/31-A10 SU:STA HD:STA LOW 70% SCLK 30% 70% SDIO 30% START t r:IN Figure 2. 2-Wire Control Interface Read and Write Timing Parameters SCLK A6-A0, SDIO R/W START ADDRESS + R/W Figure 3. 2-Wire Control Interface Read ...
Page 9
Table 6. 3-Wire Control Interface Characteristics (V = 2 1 Parameter SCLK Frequency SCLK High Time SCLK Low Time SDIO Input, SEN to SCLK↑ Setup SDIO Input to SCLK↑ ...
Page 10
Si4730/31-A10 Table 7. SPI Control Interface Characteristics (V = 2 1 Parameter SCLK Frequency SCLK High Time SCLK Low Time SDIO Input, SEN to SCLK↑ Setup SDIO Input to ...
Page 11
Table 8. FM Receiver Characteristics (V = 2.7 to 5.5 V, VIO = 1 Parameter Input Frequency Sensitivity with Headphone 3,4,5 Network Sensitivity with 50 Ω Network 3,4,5,7 7 RDS Sensitivity 6,7 LNA Input Resistance ...
Page 12
Si4730/31-A10 Table 8. FM Receiver Characteristics (V = 2.7 to 5.5 V, VIO = 1 Parameter 7 Seek/Tune Time 7 Powerup Time RSSI Offset Notes: 1. Additional testing information is available in Application Note AN234. ...
Page 13
Table 10. Reference Clock and Crystal Characteristics (V = 2.7 to 5.5 V, VIO = 1 Parameter 1 RCLK Supported Frequencie 2 RCLK Frequency Tolerance REFCLK_PRESCALE REFCLK Crystal Oscillator Frequency 2 Crystal Frequency Tolerance Board ...
Page 14
Si4730/31-A10 2. Typical Application Schematic FMIP FMI 3 RFGND L1 4 AMI AM antenna 5 C5 RST RST SEN SCLK SDIO RCLK VIO 1.5 to 3.6 V Notes: 1. Place C1 close to V pin ...
Page 15
Bill of Materials Component(s) C1 Supply bypass capacitor, 22 nF, ±20%, Z5U/X7R C5 Coupling capacitor, 0.47 µF, ±20%, Z5U/X7R L1 Ferrite loop stick, 180 U1 Si4730/31 AM/FM Radio Tuner T1 Transformer, 1–5 turns ratio L2 Air loop antenna, 10–20 ...
Page 16
... The Si4731 incorporates a digital processor for the European Radio Data System (RDS) and the North American Radio Broadcast Data System (RBDS) including ...
Page 17
... Output left and right channels are obtained by adding and subtracting the (L+R) and (L–R) signals respectively. The Si4731 uses frequency information from the 19 kHz stereo pilot to recover the 57 kHz RDS/RBDS signal. 4.5.2. Stereo-Mono Blending ...
Page 18
... The Si4731 device is user configurable and provides an optional interrupt when RDS is synchronized, loses synchronization, and/or the user configurable RDS FIFO threshold has been met. The Si4731 reports RDS decoder synchronization status, and detailed bit errors in the information word for each RDS block with the FM_RDS_STATUS command. The range of reportable block errors is 0, 1– ...
Page 19
Table 11. Bus Mode Select on Rising Edge of RST Bus Mode GPO1 2-Wire 1 SPI 1 3-Wire 0 (must drive) After the rising edge of RST, the pins GPO1 and GPO2 are used as general purpose output (O) pins ...
Page 20
... GPO Outputs GPO2 can be configured to provide interrupts for seek and tune complete, receive signal quality, and RDS. GPO1 and GPO3 are not available on Si4730-A10 and Si4731-A10. 20 4.15. Firmware Upgrades The Si4730/31 contains on-chip program RAM to accommodate minor changes to the firmware. This ...
Page 21
... Queries the status of the Received Signal Quality (RSQ) of the current channel. Returns RDS information for current channel and reads an entry from the RDS FIFO (Si4731 only). Tunes to a given AM frequency. Begins searching for a valid frequency. Queries the status of the already issued AM_TUNE_FREQ or AM_SEEK_START command ...
Page 22
Si4730/31-A10 Table 13. Si473x Property Summary (Continued) Prop Name FM_RSQ_SNR_HI_ 0x1201 THRESHOLD FM_RSQ_SNR_LO_ 0x1202 THRESHOLD FM_RSQ_RSSI_HI_ 0x1203 THRESHOLD FM_RSQ_RSSI_LO_ 0x1204 THRESHOLD FM_RSQ_BLEND_ 0x1207 THRESHOLD 0x1300 FM_SOFT_MUTE_RATE FM_SOFT_MUTE_ 0x1302 MAX_ATTENUATION FM_SOFT_MUTE_ 0x1303 SNR_THRESHOLD FM_SEEK_BAND_ 0x1400 BOTTOM 0x1401 FM_SEEK_BAND_TOP FM_SEEK_FREQ_ 0x1402 SPACING ...
Page 23
Table 13. Si473x Property Summary (Continued) Prop Name AM_SOFT_MUTE_MAX_ 0x3302 ATTENUATION AM_SOFT_MUTE_SNR_ 0x3303 THRESHOLD AM_SEEK_BAND_ 0x3400 BOTTOM 0x3401 AM_SEEK_BAND_TOP AM_SEEK_FREQ_ 0x3402 SPACING AM_SEEK_SNR_ 0x3403 THRESHOLD AM_SEEK_RSSI_ 0x3404 THRESHOLD 0x4000 RX_VOLUME 0x4001 RX_HARD_MUTE Description Sets maximum attenuation during soft mute (dB). ...
Page 24
Si4730/31-A10 6. Pin Descriptions: Si4730/31-GM RFGND Pin Number(s) Name connect. Leave floating. 2 FMI FM RF inputs. FMI should be connected to the antenna trace. 3 RFGND RF ground. Connect to ground plane on PCB. 4 ...
Page 25
... Ordering Guide Part Number* Si4730-A10-GM AM/FM Broadcast Radio Receiver Si4731-A10-GM AM/FM Broadcast Radio Receiver with RDS/RBDS *Note: Add an “(R)” at the end of the device part number to denote tape and reel option; 2500 quantity per reel. Description Rev. 1.0 Si4730/31-A10 Package Operating ...
Page 26
... Line 3 Marking: Circle = 0.5 mm Diameter (Bottom-Left Justified Year WW = Workweek 26 3110 ATTT YWW 30 = Si4730 Si4731 10 = Firmware Revision 1 Revision A Die Internal tracking code. Pin 1 Identifier Assigned by the Assembly House. Corresponds to the last sig- nificant digit of the year and workweek of the mold date. Rev. 1.0 ...
Page 27
Package Outline: Si4730/31 QFN Figure 10 illustrates the package details for the Si4730/31. Table 14 lists the values for the dimensions shown in the illustration. Figure 10. 20-Pin Quad Flat No-Lead (QFN) Symbol Millimeters Min Nom A 0.50 0.55 ...
Page 28
Si4730/31-A10 10. PCB Land Pattern: Si4730/31 QFN Figure 11 illustrates the PCB land pattern details for the Si4730/31-GM. Table 15 lists the values for the dimensions shown in the illustration. 28 Figure 11. PCB Land Pattern Rev. 1.0 ...
Page 29
Table 15. PCB Land Pattern Dimensions Symbol Millimeters Min Max D 2.71 REF D2 1.60 1.80 e 0.50 BSC E 2.71 REF E2 1.60 1.80 f 2.53 BSC GD 2.10 — Notes: General 1. All dimensions shown are in millimeters ...
Page 30
Si4730/31-A10 11. Additional Reference Resources Si4730/31 Revision A Errata AN231: Si4700/01 Headphone and Antenna Interface AN383: Si47xx QFN Universal Layout Guide AN384: Si473x AM/FM Receiver Layout Guide AN385: Si473x AM/FM Receiver Programming Guide AN386: Si473x ...
Page 31
... Summary,” on page 21. Added "8. Package Markings (Top Marks)" on page 26. Added digital audio output information. Updated Table 4, “Reset Timing Characteristics on page 6. Updated "4.9. RDS/RBDS Processor (Si4731 Only)" on page 18. Updated "6. Pin Descriptions: Si4730/31-GM" on page 24. Si4730/31-A10 Revision 0.7 to Revision 1.0 Updated data sheet to be specific to Si4730/31-A10 ...
Page 32
... Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized ap- plication, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages. Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc. Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders. ...