SI4731-C40-GU Silicon Laboratories Inc, SI4731-C40-GU Datasheet

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SI4731-C40-GU

Manufacturer Part Number
SI4731-C40-GU
Description
IC RX AMFM RADIO RDS 24SSOP
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of SI4731-C40-GU

Frequency
520kHz ~ 1.71MHz, 64MHz ~ 108MHz
Modulation Or Protocol
AM, FM
Applications
General Purpose
Current - Receiving
19.9mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Features
RSSI Equipped
Voltage - Supply
2 V ~ 5.5 V
Operating Temperature
-20°C ~ 85°C
Package / Case
24-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Sensitivity
-
Memory Size
-
Data Rate - Maximum
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
B
Features
Applications
Description
The Si4730/31 is the first digital CMOS AM/FM radio receiver IC that integrates
the complete tuner function from antenna input to audio output.
Functional Block Diagram
Rev. 1.0 12/09
Worldwide FM band support
(64–108 MHz)
Worldwide AM band support
(520–1710 kHz)
Excellent real-world performance
Freq synthesizer with integrated VCO
Advanced AM/FM seek tuning
Automatic frequency control (AFC)
Automatic gain control (AGC)
Digital FM stereo decoder
Programmable AVC max gain
Programmable de-emphasis
Seven selectable AM channel filters
AM/FM digital tuning
Table and portable radios
Stereos
Mini/micro systems
CD/DVD players
Boom boxes
ROADCAST
2.7– 5.5 V (QFN)
2.0– 5.5 V (SSOP)
ANT
ANT
FM
AM
RFGND
GND
VDD
AMI
FMI
LNA
LNA
AGC
AGC
LDO
AM/FM R
Copyright © 2009 by Silicon Laboratories
AFC
EN55020 compliant
No manual alignment necessary
Programmable reference clock
Volume control
Adjustable soft mute control
RDS/RBDS processor (Si4731)
Optional digital audio out (Si4731)
2-wire and 3-wire control interface
Integrated LDO regulator
2.0 to 5.5 V supply voltage (SSOP)
2.7 to 5.5 V supply voltage (QFN)
Wide range of ferrite loop sticks and
air loop antennas supported
QFN and SSOP packages
ADC
ADC
Modules
Clock radios
Mini HiFi
Entertainment systems
RoHS compliant
(Si4731)
LOW-IF
ADIO
RDS
DSP
INTERFACE
CONTROL
Si473x
DIGITAL
(Si4731)
AUDIO
DAC
DAC
R
DOUT
GPO/DCLK
ROUT
LOUT
VIO
1.85–3.6 V
ECEIVER
DFS
S i 4 7 3 0 / 3 1 - C 4 0
This product, its features, and/or its
architecture is covered by one or more of
the following patents, as well as other
patents, pending and issued, both
foreign
7,272,373;
7,355,476;
7,339,503; 7,339,504.
RFGND
GPO3/DCLK
RST
GPO2/INT
Ordering Information:
AMI
FMI
NC
RFGND
DOUT
GPO1
Si4730/31 (SSOP)
and
Pin Assignments
DFS
FMI
AMI
NC
NC
NC
NC
Si4730/31 (QFN)
2
3
4
5
1
6
See page 31.
7,272,375;
7,426,376;
20
7
10
11
12
1
2
3
4
5
6
7
8
9
domestic:
19
8
GND
PAD
18
9
24
23
22
21
20
19
18
17
16
15
14
13
Si4730/31-C40
17
10
16
11
15 DOUT
14
13
12
ROUT
DBYP
VDD
LOUT
VIO
RCLK
SDIO
SCLK
SEN
RST
GND
GND
7,127,217;
7,321,324;
7,471,940;
LOUT
ROUT
GND
VDD

Related parts for SI4731-C40-GU

SI4731-C40-GU Summary of contents

Page 1

... Programmable reference clock  Volume control  Adjustable soft mute control  RDS/RBDS processor (Si4731)  Optional digital audio out (Si4731)  2-wire and 3-wire control interface  Integrated LDO regulator  2.0 to 5.5 V supply voltage (SSOP)  2.7 to 5.5 V supply voltage (QFN)  ...

Page 2

Si4730/31-C40 2 Rev. 1.0 ...

Page 3

... AM Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21 5.5. Digital Audio Interface (Si4731 Only 5.6. Stereo Audio Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 5.7. De-emphasis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.8. Stereo DAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 5.9. Soft Mute . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.10. RDS/RBDS Processor (Si4731 Only .23 5.11. Tuning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.12. Seek . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.13. Reference Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.14. Control Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.15. GPO Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.16. Firmware Upgrades . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 5 ...

Page 4

Si4730/31-C40 1. Electrical Specifications Table 1. Recommended Operating Conditions Parameter 2 Supply Voltage Interface Supply Voltage Power Supply Powerup Rise Time Interface Power Supply Powerup Rise Time Ambient Temperature Note: 1. All minimum and maximum specifications apply across the recommended ...

Page 5

Table 3. DC Characteristics (V = 2 1. Parameter FM Mode 1 Supply Current 2 Supply Current 1 RDS Supply Current AM Mode 1 Supply Current Supplies and Interface ...

Page 6

Si4730/31-C40 Table 4. Reset Timing Characteristics (V = 2 1. Parameter RST Pulse Width and GPO1, GPO2/INT Setup to RST GPO1, GPO2/INT Hold from RST Important Notes: 1. When ...

Page 7

Table 5. 2-Wire Control Interface Characteristics (V = 2 1. Parameter SCLK Frequency SCLK Low Time SCLK High Time  SCLK Input to SDIO Setup (START)  SCLK Input ...

Page 8

Si4730/31-C40 SU:STA HD:STA LOW 70% SCLK 30% 70% SDIO 30% START t r:IN Figure 2. 2-Wire Control Interface Read and Write Timing Parameters SCLK A6-A0, SDIO R/W START ADDRESS + R/W Figure 3. 2-Wire Control Interface Read ...

Page 9

Table 6. 3-Wire Control Interface Characteristics (V = 2 1. Parameter SCLK Frequency SCLK High Time SCLK Low Time SDIO Input, SEN to SCLKSetup SDIO Input to SCLKHold  ...

Page 10

Si4730/31-C40 Table 7. SPI Control Interface Characteristics (V = 2 1. Parameter SCLK Frequency SCLK High Time SCLK Low Time SDIO Input, SEN to SCLKSetup SDIO Input to SCLKHold ...

Page 11

Table 8. Digital Audio Interface Characteristics (V = 2 1. Parameter DCLK Cycle Time DCLK Pulse Width High DCLK Pulse Width Low DFS Set-up Time to DCLK Rising Edge ...

Page 12

Si4730/31-C40 Table 9. FM Receiver Characteristics (V = 2 1. Parameter Input Frequency Sensitivity with Headphone 3,4,5 Network Sensitivity with 50  Network 3,4,5,6 6 RDS Sensitivity 6,7 LNA ...

Page 13

Table 9. FM Receiver Characteristics (V = 2 1. Parameter 3,4,5,6,12,13 Blocking Sensitivity 3,4,5,6,12,13 Intermode Sensitivity 6,10 Audio Output Load Resistance 6,10 Audio Output Load Capacitance 6 Seek/Tune Time ...

Page 14

Si4730/31-C40 Table 10. 64–75.9 MHz Input Frequency FM Receiver Characteristics (V = 2 1. Parameter Input Frequency Sensitivity with Headphone 3,4,5 Network 7 LNA Input Resistance 7 LNA Input ...

Page 15

Table 11. AM Receiver Characteristics (V = 2 1. – ° Parameter Symbol Input Frequency 3,4,5,6 Sensitivity Large Signal Voltage 4,6,7 Handling 6 Power Supply Rejection ...

Page 16

Si4730/31-C40 Table 12. Reference Clock and Crystal Characteristics (V = 2 1. Parameter 1 RCLK Supported Frequencies 2 RCLK Frequency Tolerance REFCLK_PRESCALE REFCLK Crystal Oscillator Frequency 2 Crystal Frequency ...

Page 17

Typical Application Schematic (QFN FMIP FMI 3 RFGND L1 4 AMI AM antenna 5 C5 RST RST SEN SCLK SDIO RCLK VIO 1.85 to 3.6 V Notes: 1. Place C1 close to V pin ...

Page 18

Si4730/31-C40 3. Typical Application Schematic (SSOP) Optional: Digital Audio Output R3 DOUT R2 C4 DFS R1 GPO3/DCLK GPO2/INT GPO1 NC NC FMI RFGND antenna AMI C5 X1 GPIO3 C2 C3 Optional: for crystal oscillator option Notes: ...

Page 19

Bill of Materials (QFN/SSOP) Component(s) C1 Supply bypass capacitor, 22 nF, ±20%, Z5U/X7R C5 Coupling capacitor, 0.47 µF, ±20%, Z5U/X7R L1 Ferrite loop stick, 180 U1 Si4730/31 AM/FM Radio Tuner T1 Transformer, 1–5 turns ratio L2 Air loop antenna, ...

Page 20

... In AM mode, radio signals are received on AMI and processed by the AM front-end circuitry. In addition to the receiver mode, there is a clocking mode to choose to clock the Si4730/31 from a reference clock or crystal. On the Si4731, there is an audio output mode to choose between an analog and/or digital audio output. Rev. 1.0 Si473x ...

Page 21

... AM air loop antennas which generally vary between 10 and 20 µH. 5.5. Digital Audio Interface (Si4731 Only) The digital audio interface operates in slave mode and supports three different audio data formats: 2  ...

Page 22

... Output left and right channels are obtained by adding and subtracting the (L+R) and (L–R) signals respectively. The Si4731 uses frequency information from the 19 kHz stereo pilot to recover the 57 kHz RDS/RBDS signal. 5.6.2. Stereo-Mono Blending ...

Page 23

... The Si4731 device is user configurable and provides an optional interrupt when RDS is synchronized, loses synchronization, and/or the user configurable RDS FIFO threshold has been met. The Si4731 reports RDS decoder synchronization status and detailed bit errors in the information word for each RDS block with the FM_RDS_STATUS command. The range of reportable block errors is 0, 1– ...

Page 24

Si4730/31-C40 RST is low, and the GPO2 pin includes an internal pull- down resistor, which is connected while RST is low. Therefore only necessary for the user to actively drive pins which differ from these states. See Table ...

Page 25

SPI Control Interface Mode When selecting SPI mode, the user must ensure that a rising edge of SCLK does not occur within 300 ns before the rising edge of RST. SPI bus mode uses the SCLK, SDIO, and SEN ...

Page 26

... Queries the status of the Received Signal Quality (RSQ) of the current channel. Returns RDS information for current channel and reads an entry from the RDS FIFO (Si4731 only). Selects the AM tuning frequency. Begins searching for a valid frequency. Queries the status of the RSQ of the current channel. ...

Page 27

Table 15. Selected Si473x Properties Prop Name 0x1100 FM_DEEMPHASIS FM_BLEND_STEREO_ 0x1105 THRESHOLD FM_BLEND_MONO_ 0x1106 THRESHOLD FM_RSQ_INT_ 0x1200 SOURCE 0x1300 FM_SOFT_MUTE_RATE FM_SOFT_MUTE_ 0x1302 MAX_ATTENUATION FM_SOFT_MUTE_ 0x1303 SNR_THRESHOLD FM_SEEK_BAND_ 0x1400 BOTTOM 0x1401 FM_SEEK_BAND_TOP FM_SEEK_FREQ_ 0x1402 SPACING FM_SEEK_TUNE_ 0x1403 SNR_THRESHOLD FM_SEEK_TUNE_ 0x1404 RSSI_TRESHOLD ...

Page 28

Si4730/31-C40 Table 15. Selected Si473x Properties (Continued) Prop Name 0x3401 AM_SEEK_BAND_TOP AM_SEEK_FREQ_ 0x3402 SPACING AM_SEEK_SNR_ 0x3403 THRESHOLD AM_SEEK_RSSI_ 0x3404 THRESHOLD 0x4000 RX_VOLUME 0x4001 RX_HARD_MUTE 28 Description Sets the top of the AM band for seek. Selects frequency spacing for AM ...

Page 29

Pin Descriptions: Si4730/31-GM RFGND Pin Number(s) Name connect. Leave floating. 2 FMI FM RF inputs. FMI should be connected to the antenna trace. 3 RFGND RF ground. Connect to ground plane on PCB. 4 AMI ...

Page 30

Si4730/31-C40 8. Pin Descriptions: Si4730/31-GU Pin Number(s) Name 1 DOUT Digital output data in digital output mode. 2 DFS Digital frame synchronization input in digital output mode. 3 GPO3/DCLK General purpose output, crystal oscillator, or digital bit synchronous clock input ...

Page 31

... AM/FM Broadcast Radio Receiver Si4731-C40-GM AM/FM Broadcast Radio Receiver with RDS/RBDS Si4731-C40-GU AM/FM Broadcast Radio Receiver with RDS/RBDS *Note: Add an “(R)” at the end of the device part number to denote tape and reel option; 2500 quantity per reel. SSOP devices operate down ° ...

Page 32

... Line 3 Marking: Circle = 0.5 mm Diameter (Bottom-Left Justified Year WW = Workweek 32 3140 CTTT YWW 30 = Si4730 Si4731 Firmware Revision 4. Revision C Die. Internal tracking code. Pin 1 Identifier. Assigned by the Assembly House. Corresponds to the last significant digit of the year and work week of the mold date. Rev. 1.0 ...

Page 33

... Top Mark Explanation (SSOP) Mark Method: YAG Laser Part Number Line 1 Marking: Die Revision Firmware Revision YY = Year Line 2 Marking Work week TTTTTT = Manufacturing code 4730C40GU YYWWTTTTTT 4730 = Si4730; 4731 = Si4731 Revision C die Firmware Revision 4.0. Assigned by the Assembly House. Rev. 1.0 Si4730/31-C40 33 ...

Page 34

Si4730/31-C40 11. Package Outline: Si4730/31 QFN Figure 14 illustrates the package details for the Si4730/31. Table 16 lists the values for the dimensions shown in the illustration. Figure 14. 20-Pin Quad Flat No-Lead (QFN) Symbol Millimeters Min Nom A 0.50 ...

Page 35

PCB Land Pattern: Si4730/31 QFN Figure 15 illustrates the PCB land pattern details for the Si4730/31-C40-GM QFN. Table 17 lists the values for the dimensions shown in the illustration. Figure 15. PCB Land Pattern Rev. 1.0 Si4730/31-C40 35 ...

Page 36

Si4730/31-C40 Table 17. PCB Land Pattern Dimensions Symbol Millimeters Min 2.10 Notes: General 1. All dimensions shown are in millimeters (mm) unless otherwise noted. 2. Dimensioning and Tolerancing is per the ...

Page 37

Package Outline: Si4730/31 SSOP Figure 16 illustrates the package details for the Si4730/31. Table 18 lists the values for the dimensions shown in the illustration. Dimension θ aaa bbb ...

Page 38

Si4730/31-C40 14. PCB Land Pattern: Si4730/31 SSOP Figure 17 illustrates the PCB land pattern details for the Si4730/31-C40-GU SSOP. Table 19 lists the values for the dimensions shown in the illustration. Table 19. PCB Land Pattern Dimensions Dimension C E ...

Page 39

Additional Reference Resources Contact your local sales representatives for more information or to obtain copies of the following references:  EN55020 Compliance Test Certificate  AN332: Si47xx Programming Guide  AN383: Si47xx Antenna, Schematic, Layout, and Design Guidelines  ...

Page 40

Si4730/31-C40 OCUMENT HANGE IST Revision 0.5 to Revision 0.7  Updated Table 3, “DC Characteristics,” on page 5.  Updated Table 9, “FM Receiver Characteristics on page 12.  Updated Table 15, “Selected Si473x Properties,” on page ...

Page 41

N : OTES Si4730/31-C40 Rev. 1.0 41 ...

Page 42

... Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized ap- plication, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages. Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc. Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders. ...

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