TEA5764UK-G ST-Ericsson Inc, TEA5764UK-G Datasheet - Page 34

• Manufacturer Part Number: TEA5764UK-G
• Description: IC FM STEREO RADIO W/RDS 34WLB
• Manufacturer: ST-Ericsson Inc

Specifications of TEA5764UK-G

• Frequency: 76MHz ~ 90MHz, 87.5MHz ~ 108MHz
• Sensitivity: -108dBm
• Modulation Or Protocol: FM
• Applications: FM Radio Receiver
• Current - Receiving: 1.5mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Voltage - Supply: 2.5 V ~ 3.3 V
• Package / Case: 34-WLBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Operating Temperature: -
• Memory Size: -
• Data Rate - Maximum: -
• Other names: 935278071027

Philips Semiconductors
TEA5764UK_2
Product data sheet
Fig 14. Bus timing diagram
ENABLE
BUS
SCL
SDA
t
t
t
t
t
t
Remark: 300 ns lower limit is added because the ASIC has no internal hold time for the SDA signal.
t
t
t
C
t
t
f
r
HD;STA
HIGH
SU;STA
HD;DAT
SU;DAT
SU;STO
BUF
SU;BUSEN
HO;BUSEN
= fall time of both SDA and SCL signals: 20 + 0.1 C
b
= rise time of both SDA and SCL signals: 20 + 0.1 C
= capacitive load of one bus line: < 400 pF.
= bus free time between a STOP and a START condition: > 600 ns.
= HIGH period of the SCL clock: > 600 ns.
P
= setup time for a repeated START condition: > 600 ns.
= data setup time: t
= hold time (repeated) START condition. After this period, the first clock pulse is generated: > 600 ns.
= data hold time: 300 < t
t
= setup time for STOP condition: > 600 ns.
SU;BUSEN
= bus enable setup time: t
= bus enable hold time: t
t
BUF
To speed up RDS traffic it is possible to read all the RDS data and then only write back
byte INTMSK to set the appropriate mask(s) again.
I
2
C-bus activity:
•
•
•
S
t
HD;STA
With bits PUPD the TEA5764UK can be switched in a low current Standby mode. The
I
When the I
without programmed Standby mode, the TEA5764UK keeps its normal operation, but
is isolated from the I
It is possible to operate the TEA5764UK with BUSENABLE hard wired to pin
VREFDIG, and have the bus interface always active.
2
C-bus is then still active
SU;DAT
HD;DAT
t
> 100 ns. If ASIC is used in a standard mode I
SU;DAT
HO:BUSEN
SU;BUSEN
2
C-bus interface is deactivated, by making pin BUSENABLE LOW and
< 900 ns.
t
HD;DAT
> 10 s.
> 10 s.
Rev. 02 — 9 August 2005
2
C-bus lines
b
t
r
t
b
< t
HIGH
< t
f
f
t
< 300 ns, where C
f
< 300 ns, where C
t
LOW
b
b
= total capacitance on bus line in pF.
= total capacitance on bus line in pF.
t
2
SU;STA
C-bus system, t
Sr
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
SU;DAT
TEA5764UK
> 250 ns.
t
SU;STO
t
HO;BUSEN
FM radio + RDS
001aac796
P
33 of 64