PIC18LF24K22-I/SP Microchip Technology, PIC18LF24K22-I/SP Datasheet - Page 413

• Manufacturer Part Number: PIC18LF24K22-I/SP
• Description: IC PIC MCU 16KB FLASH 28SPDIP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18LF24K22-I/SP

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 19x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Controller Family/series: PIC18
• No. Of I/o's: 25
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 768Byte
• Cpu Speed: 64MHz
• No. Of Timers: 7
• Processor Series: PIC18LF
• Core: PIC
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

SUBFSR
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
 2010 Microchip Technology Inc.
Q Cycle Activity:
Before Instruction
After Instruction
Decode
FSR2
FSR2
Q1
=
=
register ‘f’
Subtract Literal from FSR
SUBFSR f, k
0  k  63
f  [ 0, 1, 2 ]
FSR(f) – k  FSRf
None
The 6-bit literal ‘k’ is subtracted from
the contents of the FSR specified by
‘f’.
1
1
SUBFSR 2, 23h
Read
1110
Q2
03FFh
03DCh
1001
Process
Data
Q3
ffkk
destination
Write to
kkkk
Q4
Preliminary
SUBULNK
Syntax:
Operands:
Operation:
Status Affected: None
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
PIC18(L)F2X/4XK22
Before Instruction
After Instruction
Operation
Decode
FSR2
PC
FSR2
PC
Q1
No
Subtract Literal from FSR2 and Return
SUBULNK k
0  k  63
FSR2 – k  FSR2
(TOS) PC
The 6-bit literal ‘k’ is subtracted from the
contents of the FSR2. A RETURN is then
executed by loading the PC with the TOS.
The instruction takes two cycles to
execute; a NOP is performed during the
second cycle.
This may be thought of as a special case of
the SUBFSR instruction, where f = 3 (binary
‘11’); it operates only on FSR2.
1
2
1110
=
=
=
=
register ‘f’
Operation
SUBULNK 23h
Read
Q2
No
03FFh
0100h
03DCh
(TOS)
1001
Operation
Process
Data
Q3
No
DS41412D-page 413
11kk
destination
Operation
Write to
kkkk
Q4
No