SP3232EEP-L Exar Corporation, SP3232EEP-L Datasheet - Page 10

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SP3232EEP-L

Manufacturer Part Number
SP3232EEP-L
Description
IC TXRX RS232 ESD TRUE 16PDIP
Manufacturer
Exar Corporation
Type
Transceiverr
Datasheet

Specifications of SP3232EEP-L

Package / Case
16-DIP (0.300", 7.62mm)
Number Of Drivers/receivers
2/2
Protocol
RS232
Voltage - Supply
3 V ~ 5.5 V
Mounting Type
Through Hole
On Resistance (max)
5 KOhms
Propagation Delay Time
1 us
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Function
Transceiver
Mounting Style
Through Hole
Supply Current
1 mA
Supply Voltage (max)
5.5 V
Supply Voltage (min)
3 V
Logic Type
RS-232 Transceivers
Number Of Circuits
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SP3232EEP-L
Manufacturer:
SIPEX
Quantity:
20 000
In most circumstances, decoupling the
power supply can be achieved adequately
using a 0.1µF bypass capacitor at C5 (refer
to figures 6 and 7). In applications that are
sensitive to power-supply noise, decouple
Vcc to ground with a capacitor of the same
value as charge-pump capacitor C1. Physi-
cally connect bypass capcitors as close to
the IC as possible.
The charge pump operates in a discontinu-
ous mode using an internal oscillator. If the
output voltages are less than a magnitude
of 5.5V, the charge pump is enabled. If the
output voltages exceed a magnitude of 5.5V,
the charge pump is disabled. This oscillator
controls the four phases of the voltage shift-
ing. A description of each phase follows.
Phase 1
— V
of the clock cycle, the positive side of capaci-
tors C
C
in C
nected to V
capacitor C
Phase 2
— V
connects the negative terminal of C
storage capacitor and the positive terminal of
C
ated voltage to C
regulated to a minimum voltage of -5.5V.
Simultaneous with the transfer of the volt-
age to C
is switched to V
connected to GND.
Phase 3
— V
the clock is identical to the first phase — the
charge transferred in C
the negative terminal of C
to the negative side of capacitor C
C
is 2 times V
l
2
2
+
+
to GND. This transfers a negative gener-
is then switched to GND and the charge
is at V
1
DD
SS
SS
is transferred to C
1
charge storage — During this phase
charge storage — The third phase of
transfer — Phase two of the clock
and C
3
, the positive side of capacitor C
CC
2
CC
, the voltage potential across C
CC
is now 2 times V
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com
, the voltage potential across
.
2
are initially charged to V
CC
3
. This generated voltage is
and the negative side is
2
1
. Since C
produces –V
1
, which is applied
CC
.
2
to the V
2
2
+
. Since
is con-
CC
CC
SS
in
1
2
.
10
Phase 4
— V
the clock connects the negative terminal
of C
generated voltage across C
V
regulated to +5.5V. At this voltage, the in-
ternal oscillator is disabled. Simultaneous
with the transfer of the voltage to C
positive side of capacitor C
to V
nected to GND, allowing
pump cycle to begin again. The charge
pump cycle will continue as long as the
operational conditions for the internal
oscillator are present.
Since both V
ated from V
and V
pump approaches that generate V
V
of V
inefficiencies in the design.
The clock rate for the charge pump typically
operates at greater than 250kHz. The exter-
nal capacitors can be as low as 0.1µF with
a 16V breakdown voltage rating.
DD
+
will show a decrease in the magnitude
2
CC
storage capacitor.
DD
to GND, and transfers this positive
compared to V
and
will be symmetrical. Older charge
transfer — The fourth phase of
CC
+
and V
the
, in a no–load condition V
negative side is con-
are separately gener-
SP3222E/SP3232E_100_120810
+
due to the inherent
This voltage is
DESCRIPTION
1
2
the charge
is switched
to C
4
4
, the
, the
from
+

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