NMTC-S20200XRGHS-10 Microtips Technology, NMTC-S20200XRGHS-10 Datasheet - Page 18

LCD Character Display Modules Gray Reflective

NMTC-S20200XRGHS-10

Manufacturer Part Number
NMTC-S20200XRGHS-10
Description
LCD Character Display Modules Gray Reflective
Manufacturer
Microtips Technology
Datasheet

Specifications of NMTC-S20200XRGHS-10

Character Count X Line
20 x 2
Module Size (w X H X T)
116 mm x 37 mm x 10 mm
Fluid Type
STN
Background Color
Gray
Backlight Type
None
Display Mode
Reflective
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Write Data to RAM
Write binary 8-bit data to DDRAM/CGRAM.
The selection of RAM from DDRAM, CGRAM, is set by the previous address set instruction :
DDRAM address set, CGRAM address set. RAM set instruction can also determine the AC
direction to RAM. After write operation, the address is automatically increased/decreased by 1,
according to the entry mode.
Read Data to RAM
Read binary 8-bit data from DDRAM/CGRAM.
The selection of RAM is set by the previous address set instruction. If address set instruction of
RAM is not performed before this instruction, the data that read first is invalid, because the
direction of AC is not determined. If you read RAM data several times without RAM address set
instruction before read operation, you can get correct RAM data from the second, but the first data
would be incorrect, because there is no time margin to transfer RAM data.
In case of DDRAM read operation, cursor shift instruction plays the same role as DDRAM address
set instruction : it also transfers RAM data to output data register. After read operation address
counter is automatically increased/decreased by 1 according to the entry mode. After CGRAM read
operation, display shift may not be executed correctly.
NOTE: In case of RAM write operation, after this AC is increased/decreased by 1 like read
operation. In this time, AC indicates the next address position, but you can read only the previous
data by read instruction.
RS
RS
1
1
R/W
R/W
0
0
DB7
DB7
D7
D7
DB6
DB6
D6
D6
DB5
DB5
D5
D5
DB4
DB4
D4
D4
18
DB3
DB3
D3
D3
DB2
DB2
D2
D2
DB1
DB1
D1
D1
DB0
DB0
D0
D0

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