NCP3126ADR2G ON Semiconductor, NCP3126ADR2G Datasheet - Page 12

• Manufacturer Part Number: NCP3126ADR2G
• Description: DC/DC Switching Converters 3A PWM Switching Buck Regulator
• Manufacturer: ON Semiconductor

Specifications of NCP3126ADR2G

• Mounting Style: SMD/SMT
• Duty Cycle (max): 80 %
• Efficiency: 93 %
• Input / Supply Voltage (max): 13.2 V
• Input / Supply Voltage (min): 4.5 V
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 125 C
• Output Current: 3 A
• Output Voltage: Adjustable
• Supply Current: 10 mA
• Switching Frequency: 350 KHz
• Package / Case: SOIC-8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

capacitor bank dominates the transient response. Please note
that DV
other, and the larger of these two voltages will determine the
maximum deviation of the output voltage (neglecting the
effect of the ESL).
Input Capacitor Selection
produced during the on time of the upper MOSFET, so it
must have a low ESR to minimize the losses. The RMS value
of the input ripple current is:
D
IIN
I
Loss in the input capacitors can be calculated with the
following equation:
CIN
IIN
P
or ceramics should be used. If a tantalum must be used, it
must be surge protected, otherwise, capacitor failure could
occur.
Power MOSFET Dissipation
thermal environment drive power supply design. Once the
dissipation is known, the thermal impedance can be
calculated to prevent the specified maximum junction
temperatures from being exceeded at the highest ambient
temperature.
conduction losses and switching losses. The high−side
MOSFET will display both switching and conduction
losses. The switching losses of the low side MOSFET will
not be calculated as it switches into nearly zero voltage and
the losses are insignificant. However, the body diode in the
low−side MOSFET will suffer diode losses during the
non−overlap time of the gate drivers.
OUT
Iin
CIN
P
In a typical converter design, the ESR of the output
The input capacitor has to sustain the ripple current
The equation reaches its maximum value with D = 0.5.
Due to large di/dt through the input capacitors, electrolytic
MOSFET power dissipation, package size, and the
Power dissipation has two primary contributors:
CIN
RMS
RMS
RMS
ESR
+ CIN
14.8 mW + 10 mW * 1.22 A
OUT−DIS
1.22 A + 3 A * 27.58% * ( 1 * 27.58% )
+ I
OUT
ESR
= Duty ratio
= Input capacitance RMS current
= Load current
= Input capacitance Equivalent Series
= Input capacitance RMS current
= Power loss in the input capacitor
and DV
D
Resistance
* IiN
(1 * D) ³
RMS
OUT−ESR
2
³
are out of phase with each
2
(eq. 19)
(eq. 20)
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dissipation can be approximated from:
P
P
P
high−side MOSFET while it is on.
I
R
P
Using the ra term from Equation 5, I
I
I
D
ra
loss and can be approximated from the following equations.
P
P
P
P
are the losses associated with turning the high−side
MOSFET on and off and the corresponding overlap in drain
voltage and current.
F
I
t
t
V
P
P
P
FALL
RISE
RMS_HS
RMS_HS
OUT
OUT
COND
SW_TOT
D_HS
cond
DS
RR
SW
SW_TOT
SW
SW
TON
TOFF
DS(on)_HS
IN
Starting with the high−side MOSFET, the power
The first term in Equation 21 is the conduction loss of the
The second term from Equation 21 is the total switching
The first term for total switching losses from Equation 24
P
SW
I
RMS_HS
+ P
+ 1
P
COND
2
TON
P
@ I
D_HS
P
= RMS current in the high−side MOSFET
= On resistance of the high−side MOSFET
= Conduction power losses
= High side MOSFET RMS current
= Output current
= Duty ratio
= Ripple current ratio
= High side MOSFET drain source losses
= High side MOSFET reverse recovery losses
= High side MOSFET switching losses
= High side MOSFET total switching losses
= Switching frequency
= Load current
= MOSFET fall time
= MOSFET rise time
= Input voltage
= High side MOSFET switching losses
= Turn on power losses
= Turn off power losses
+ I
+ I
SW_TOT
OUT
) P
= Conduction power losses
= Total switching losses
= Power losses in the high side MOSFET
+ P
OUT
@ V
RMS_HS
TOFF
IN
@
+ P
COND
@ F
SW
2
D @ 1 )
SW
) P
@ R
) P
@ t
DS(on)_HS
SW_TOT
DS
RISE
RMS
ra
12
) P
2
) t
becomes:
RR
FALL
(eq. 25)
(eq. 21)
(eq. 22)
(eq. 23)
(eq. 24)