A2F500M3G-FGG484 Actel, A2F500M3G-FGG484 Datasheet - Page 117

• Manufacturer Part Number: A2F500M3G-FGG484
• Description: FPGA - Field Programmable Gate Array 500K System Gates
• Manufacturer: Actel

Specifications of A2F500M3G-FGG484

• Processor Series: A2F500
• Core: ARM Cortex M3
• Number Of Logic Blocks: 24
• Maximum Operating Frequency: 100 MHz
• Number Of Programmable I/os: 204
• Data Ram Size: 64 KB
• Delay Time: 50 ns
• Supply Voltage (max): 3.6 V
• Supply Current: 2 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: A2F-Eval-Kit, A2F-Dev-Kit, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.5 V
• Number Of Gates: 500000
• Package / Case: FPBGA-484
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Name
PCAP
PTBASE
PTEM
MSS_RESET_N
PU_N
Type Polarity/Bus Size
In
In
Low
Low
1
1
1
Positive Capacitor connection.
This is the positive terminal of the charge pump. A capacitor, with a 2.2
µF recommended value, is required to connect between PCAP and
NCAP. If this pin is not used, it must be left unconnected/floating. In this
case, no capacitor is needed. Analog charge pump capacitors are not
needed if none of the analog SCB features are used, and none of the
SDDs are used.
Pass transistor base connection
This is the control signal of the voltage regulator. This pin should be
connected to the base of an external pass transistor used with the 1.5
V internal voltage regulator and can be floating if not used.
Pass transistor emitter connection.
This is the feedback input of the voltage regulator.
This pin should be connected to the emitter of an external pass
transistor used with the 1.5 V internal voltage regulator and can be
floating if not used.
Reset signal for the microcontroller subsystem.
Push-button is the connection for the external momentary switch used
to turn on the 1.5 V voltage regulator and can be floating if not used.
R e v i s i o n 6
SmartFusion Intelligent Mixed Signal FPGAs
Description
5 -7