A42MX24-PLG84 Actel, A42MX24-PLG84 Datasheet - Page 25

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A42MX24-PLG84

Manufacturer Part Number
A42MX24-PLG84
Description
FPGA - Field Programmable Gate Array 36K System Gates
Manufacturer
Actel
Datasheet

Specifications of A42MX24-PLG84

Processor Series
A42MX24
Core
IP Core
Number Of Macrocells
912
Maximum Operating Frequency
250 MHz
Number Of Programmable I/os
140
Delay Time
5.6 ns
Supply Voltage (max)
5.5 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
Mounting Style
SMD/SMT
Supply Voltage (min)
3 V
Number Of Gates
36 K
Package / Case
PLCC-84
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
A42MX24-PLG84
Manufacturer:
Actel
Quantity:
135
Part Number:
A42MX24-PLG84
Manufacturer:
Microsemi SoC
Quantity:
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Part Number:
A42MX24-PLG84I
Manufacturer:
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Quantity:
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Output Drive Characteristics for 5.0V PCI Signaling
MX PCI device I/O drivers were designed specifically for high-performance PCI systems.
the typical output drive characteristics of the MX devices. MX output drivers are compliant with the PCI Local Bus
Specification.
Table 17 •
Table 18 •
Symbol
V
V
V
I
I
V
V
C
C
L
Notes:
1. PCI Local Bus Specification, Version 2.1, Section 4.2.1.1.
2. Maximum rating for V
3. Dependent upon the chosen package. PCI recommends QFP and BGA packaging to reduce pin inductance and capacitance.
Symbol
I
Slew (r)
Slew (f)
Note: *PCI Local Bus Specification, Version 2.1, Section 4.2.1.2.
IH
IL
CL
PIN
CCI
IH
IL
OH
OL
IN
CLK
DC Specification (5.0V PCI Signaling)
AC Specifications (5.0V PCI Signaling)*
Input High Leakage Current
Input Low Leakage Current
Output Rise Slew Rate
Output Fall Slew Rate
Low Clamp Current
Supply Voltage for I/Os
Input Pin Capacitance
Output High Voltage
CLK Pin Capacitance
Output Low Voltage
Input High Voltage
Input Low Voltage
Parameter
Pin Inductance
Parameter
CCI
–0.5V to 7.0V.
0.4V to 2.4V load
2.4V to 0.4V load
–5 < V
Condition
I
I
I
OUT
OUT
Condition
OUT
V
V
IN
IN
6 mA
= –2 mA
= –6 mA
= 3 mA,
IN
= 2.7V
=0.5V
1
–1
v6.1
–25 + (V
Min.
4.75
–0.5
2.0
2.4
5
/0.015
Min.
1
1
PCI
IN
+1)
PCI
V
CC
Max.
5.25
0.55
–70
0.8
70
10
12
20
+ 0.5
Max.
5
5
Min.
4.75
3.84
–0.3
2.0
Figure 1-16 on page 1-21
40MX and 42MX FPGA Families
Min.
–60
1.8
2.8
MX
V
MX
< 8 nH
CCI
Max.
5.25
0.33
–10
0.8
10
10
10
+ 0.3
2
Max.
–10
3
2.8
4.3
Units
µA
µA
nH
pF
pF
Units
V
V
V
V
V
V/ns
V/ns
shows
mA
1-19

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