A40MX02-PLG68 Actel, A40MX02-PLG68 Datasheet - Page 32

• Manufacturer Part Number: A40MX02-PLG68
• Description: FPGA - Field Programmable Gate Array 3K System Gates
• Manufacturer: Actel

Specifications of A40MX02-PLG68

• Processor Series: A40MX02
• Core: IP Core
• Number Of Macrocells: 295
• Maximum Operating Frequency: 250 MHz
• Number Of Programmable I/os: 57
• Delay Time: 5.6 ns
• Supply Voltage (max): 5.5 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Development Tools By Supplier: Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
• Mounting Style: SMD/SMT
• Supply Voltage (min): 3 V
• Number Of Gates: 3000
• Package / Case: PLCC-68
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Sequential Module Timing Characteristics
Note: *D represents all data functions involving A, B, and S for multiplexed flip-flops.
Figure 1-25 • Flip-Flops and Latches
1 -2 6
40MX and 42MX FPGA Families
PRE, CLR
G, CLK
D*
Q
E
t SUD
CLK
(Positive Edge-Triggered)
D
E
t
v6.1
WCLKA
t SUENA
PRE
CLR
t HD
t CO
t HENA
Y
t WCLKI
t WASYN
t RS
t A