MC10H642FN ON Semiconductor, MC10H642FN Datasheet

no-image

MC10H642FN

Manufacturer Part Number
MC10H642FN
Description
IC CLOCK DRIVER ECL-TTL 28-PLCC
Manufacturer
ON Semiconductor
Type
Buffer/Driverr
Datasheet

Specifications of MC10H642FN

Frequency - Max
100MHz
Input
ECL, TTL
Output
TTL
Voltage - Supply
4.75 V ~ 5.25 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC10H642FN
Manufacturer:
ON Semiconductor
Quantity:
10 000
Part Number:
MC10H642FNG
Manufacturer:
ON Semiconductor
Quantity:
10 000
Part Number:
MC10H642FNG
Manufacturer:
ON/安森美
Quantity:
20 000
Part Number:
MC10H642FNR2
Manufacturer:
ON Semiconductor
Quantity:
10 000
Part Number:
MC10H642FNR2G
Manufacturer:
ON Semiconductor
Quantity:
10 000
MC10H642, MC100H642
68030/040 PECL to TTL
Clock Driver
Description
68030, 68040 and similar microprocessors. It is guaranteed to meet the
clock specifications required by the 68030 and 68040 in terms of
part−to−part skew, within−part skew and also duty cycle skew.
to +5.0 V) for the input clock. TTL clocks are typically used in present
MPU systems. However, as clock speeds increase to 50 MHz and
beyond, the inherent superiority of ECL (particularly differential
ECL) as a means of clock signal distribution becomes increasingly
evident. The H642 also uses differential PECL internally to achieve its
superior skew characteristic.
to achieve the necessary duty cycle skew and to generate MPU clocks
as required. A typical 50 MHz processor application would use an
input clock running at 100 MHz, thus obtaining output clocks at
50 MHz and 25 MHz (see Logic Diagram).
while the 100H version is compatible with 100K levels (referenced to
+5.0 V).
Features
Function
selects the TTL input source (DT).
ECL differential input pair, should both sides be left open. In this Case,
the DE side of the input is pulled LOW, and DE goes HIGH.
and ÷4 outputs synchronized at Power Up.
*For additional information on our Pb−Free strategy and soldering details, please
© Semiconductor Components Industries, LLC, 2006
November, 2006 − Rev. 8
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
The MC10H/100H642 generates the necessary clocks for the
The user has a choice of using either TTL or PECL (ECL referenced
The H642 includes divide−by−two and divide−by−four stages, both
The 10H version is compatible with MECL 10H™ ECL logic levels,
Reset(R): LOW on RESET forces all Q outputs LOW.
Select(SEL): LOW selects the ECL input source (DE/DE). HIGH
The H642 also contains circuitry to force a stable input state of the
Power Up: The device is designed to have positive edges of the ÷2
Generates Clocks for 68030/040
Meets 030/040 Skew Requirements
TTL or PECL Input Clock
Extra TTL and PECL Power/Ground Pins
Asynchronous Reset
Single +5.0 V Supply
Pb−Free Packages are Available*
1
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
xxx
A
WL
YY
WW
G
MARKING DIAGRAM*
http://onsemi.com
= 10 or 100
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
MCxxxH642G
FN SUFFIX
CASE 776
PLCC−28
AWLYYWW
Publication Order Number:
1
MC10H642/D

Related parts for MC10H642FN

MC10H642FN Summary of contents

Page 1

... Power Up: The device is designed to have positive edges of the ÷2 and ÷4 outputs synchronized at Power Up. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2006 November, 2006 − Rev. 8 http://onsemi.com PLCC− ...

Page 2

Figure 1. ...

Page 3

Table 2. 10H PECL CHARACTERISTICS Symbol Characteristic I Input HIGH Current INH I Input LOW Current INL V Input HIGH Voltage (Note Input LOW Voltage (Note Output Reference Voltage (Note 1) BB NOTE: Device ...

Page 4

Table 5. 10H/100H TTL DC CHARACTERISTICS Symbol Characteristic V Input HIGH Voltage IH V Input LOW Voltage IL I Input HIGH Current IH I Input LOW Current IL V Output HIGH Voltage OH V Output LOW Voltage OL V Input ...

Page 5

To maintain a duty cycle of ± MHz, limit the load capacitance and/or power supply variation as shown in Figures 1 and 2. For a ±2.5% duty cycle limit, see Figures 3 and 4. Figures 5 and 6 ...

Page 6

Figure 9. MC10H642 + Tpd versus Load, V (Overshoot at 50 MHz with no load makes graph non linear) DT RESET Figure 10. Clock Phase and ...

Page 7

Switching Circuit PECL: PECL USE 0.1 mF CAPACITORS FOR DECOUPLING COAX IN PULSE GENERATOR CH A USE OSCILLOSCOPE INTERNAL 50 W LOAD FOR TERMINATION. Figure 12. Switching Circuit and Waveforms PECL/TTL V out T T rise fall Figure ...

Page 8

... ORDERING INFORMATION Device MC10H642FN MC10H642FNG MC10H642FNR2 MC10H642FNR2G MC100H642FN MC100H642FNG MC100H642FNR2 MC100H642FNR2G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Resource Reference of Application Notes AN1405/D AN1406/D AN1503/D AN1504/D ...

Page 9

0.010 (0.250) T L− NOTES: 1. DATUMS −L−, −M−, AND −N− DETERMINED WHERE TOP OF LEAD SHOULDER EXITS PLASTIC BODY AT ...

Page 10

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

Related keywords