PIC18F26K80-I/SS Microchip Technology, PIC18F26K80-I/SS Datasheet - Page 279

• Manufacturer Part Number: PIC18F26K80-I/SS
• Description: MCU PIC 64KB FLASH 28SSOP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F26K80-I/SS

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: ECAN, I²C, LIN, SPI, UART/USART
• Number Of I /o: 24
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.6K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SSOP (0.200", 5.30mm Width)
• Controller Family/series: PIC18
• Ram Memory Size: 4KB
• Cpu Speed: 16MIPS
• No. Of Pwm Channels: 5
• Embedded Interface Type: I2C, SPI, USART
• Processor Series: PIC18F26K80
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 5
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

FIGURE 20-5:
 2011 Microchip Technology Inc.
P1M<1:0>
Relationships:
00
10
01
11
Note 1:
• Period = 4 * T
• Pulse Width = T
• Delay = 4 * T
(Single Output)
(Half-Bridge)
(Full-Bridge,
(Full-Bridge,
Reverse)
Forward)
Dead-band delay is programmed using the ECCP1DEL register (Section 20.4.6 “Programmable Dead-Band
Delay Mode”).
EXAMPLE ENHANCED PWM OUTPUT RELATIONSHIPS (ACTIVE-LOW STATE)
OSC
OSC
OSC
* (ECCP1DEL<6:0>)
* (PR2 + 1) * (TMR2 Prescale Value)
* (CCPR1L<7:0>:CCP1CON<5:4>) * (TMR2 Prescale Value)
P1A Modulated
P1A Modulated
P1B Modulated
P1A Active
P1B Inactive
P1C Inactive
P1D Modulated
P1A Inactive
P1B Modulated
P1C Active
P1D Inactive
Signal
Preliminary
0
Delay
PIC18F66K80 FAMILY
(1)
Pulse
Width
Delay
Period
(1)
DS39977C-page 279
PR2 + 1