MC74VHCT125ADR2G ON Semiconductor, MC74VHCT125ADR2G Datasheet

MC74VHCT125ADR2G

Manufacturer Part Number

MC74VHCT125ADR2G

Description

IC BUS BUFF TRI-ST QUAD 14SOIC

Manufacturer

ON Semiconductor

Series

74VHCTr

Datasheet

1.MC74VHCT125ADTRG.pdf (8 pages)

Specifications of MC74VHCT125ADR2G

Logic Type

Buffer/Line Driver, Non-Inverting

Number Of Elements

Number Of Bits Per Element

Current - Output High, Low

8mA, 8mA

Voltage - Supply

4.5 V ~ 5.5 V

Operating Temperature

-55°C ~ 125°C

Mounting Type

Surface Mount

Package / Case

14-SOIC (0.154", 3.90mm Width)

Logic Family

VHCT

Number Of Channels Per Chip

Polarity

Non-Inverting

Supply Voltage (max)

5.5 V

Supply Voltage (min)

4.5 V

Maximum Operating Temperature

+ 125 C

Mounting Style

SMD/SMT

High Level Output Current

- 8 mA

Low Level Output Current

8 mA

Maximum Power Dissipation

500 mW

Minimum Operating Temperature

- 55 C

Number Of Lines (input / Output)

4 / 3

Output Type

3-State

Propagation Delay Time

11.5 ns at 3.3 V, 7.5 ns at 5 V

Logic Device Type

Buffer, Non Inverting

Supply Voltage Range

4.5V To 5.5V

Logic Case Style

SOIC

No. Of Pins

Operating Temperature Range

-55Â°C To +125Â°C

Filter Terminals

SMD

Rohs Compliant

Yes

Family Type

VHCT

Logical Function

Buffer/Line Driver

Number Of Elements

Number Of Channels

Number Of Inputs

Number Of Outputs

Operating Supply Voltage (typ)

2.5/3.3/5V

Package Type

SOIC

Operating Supply Voltage (max)

5.5V

Operating Supply Voltage (min)

Quiescent Current

2uA

Technology

CMOS

Pin Count

Mounting

Surface Mount

Operating Temp Range

-55C to 125C

Operating Temperature Classification

Military

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Other names

MC74VHCT125ADR2G
MC74VHCT125ADR2GOSTR

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MC74VHCT125A

Quad Bus Buffer

with 3−State Control Inputs

fabricated with silicon gate CMOS technology. It achieves high speed

operation similar to equivalent Bipolar Schottky TTL while

maintaining CMOS low power dissipation.

set High to place the output into the high impedance state.

be used as a level converter for interfacing 3.3 V to 5.0 V, because it

has full 5.0 V CMOS level output swings.

between 0 V and 5.5 V are applied, regardless of the supply voltage.

The output structures also provide protection when V

input and output structures help prevent device destruction caused by

supply voltage − input/output voltage mismatch, battery backup, hot

insertion, etc.

output which provides high noise immunity and stable output. The

inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V

systems to 3.0 V systems.

Features

•

*For additional information on our Pb−Free strategy and soldering details, please

October, 2009 − Rev. 8

download the ON Semiconductor Soldering and Mounting Techniques

Reference Manual, SOLDERRM/D.

The MC74VHCT125A is a high speed CMOS quad bus buffer

The MC74VHCT125A requires the 3−state control input (OE) to be

The VHCT inputs are compatible with TTL levels. This device can

The VHCT125A input structures provide protection when voltages

The internal circuit is composed of three stages, including a buffer

High Speed: t

Low Power Dissipation: I

TTL−Compatible Inputs: V

Power Down Protection Provided on Inputs

Balanced Propagation Delays

Designed for 2.0 V to 5.5 V Operating Range

Low Noise: V

Pin and Function Compatible with Other Standard Logic Families

Latchup Performance Exceeds 300 mA

ESD Performance:

Chip Complexity: 72 FETs or 18 Equivalent Gates

Pb−Free Packages are Available*

Human Body Model > 2000 V;

Machine Model > 200 V

OLP

= 3.8 ns (Typ) at V

= 0.8 V (Max)

= 4.0 mA (Max) at T

= 0.8 V; V

= 5.0 V

= 2.0 V

= 25°C

= 0 V. These

See detailed ordering and shipping information in the package

dimensions section on page 2 of this data sheet.

(Note: Microdot may be in either location)

L, WL

Y, YY

WW, W

G or G

ORDERING INFORMATION

http://onsemi.com

CASE 751A

CASE 948G

SOEIAJ−14

DT SUFFIX

TSSOP−14

M SUFFIX

CASE 965

D SUFFIX

SOIC−14

= Assembly Location

= Wafer Lot

= Year

= Work Week

= Pb−Free Package

Publication Order Number:

MC74VHCT125A/D

DIAGRAMS

VHCT125AG

MARKING

AWLYWW

VHCT125

ALYWG

VHCT

125A

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MC74VHCT125ADR2G Summary of contents

Page 1

... Chip Complexity: 72 FETs or 18 Equivalent Gates • Pb−Free Packages are Available* *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2009 October, 2009 − Rev ...

Page 2

... Output ORDERING INFORMATION Device MC74VHCT125ADR2 MC74VHCT125ADR2G MC74VHCT125ADTR2 MC74VHCT125ADTRG MC74VHCT125AM MC74VHCT125AMG MC74VHCT125AMEL MC74VHCT125AMELG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb−Free OE4 A4 OE1 Y4 OE3 ...

Page 3

MAXIMUM RATINGS Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î ...

Page 4

AC ELECTRICAL CHARACTERISTICS Î Î Î Î ...

Page 5

SWITCHING WAVEFORMS 1. PLH 1.5V Y Figure PZL PLZ 1. PZH PHZ 1.5V Y Figure 2. TEST POINT OUTPUT DEVICE UNDER TEST *Includes all probe and jig capacitance Figure 3. ...

Page 6

G −T− SEATING 14 PL PLANE 0.25 (0.010 14X 0.58 PACKAGE DIMENSIONS SOIC−14 D SUFFIX CASE 751A−03 ISSUE 0.25 (0.010 ...

Page 7

K 14X REF 0.10 (0.004) 0.15 (0.006 L PIN 1 IDENT. 1 0.15 (0.006 −V− C 0.10 (0.004) −T− G SEATING D PLANE 14X 0.36 PACKAGE DIMENSIONS TSSOP−14 DT SUFFIX ...

Page 8

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

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