MC74VHCT125ADR2G ON Semiconductor, MC74VHCT125ADR2G Datasheet - Page 5

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MC74VHCT125ADR2G

Manufacturer Part Number
MC74VHCT125ADR2G
Description
IC BUS BUFF TRI-ST QUAD 14SOIC
Manufacturer
ON Semiconductor
Series
74VHCTr
Datasheet

Specifications of MC74VHCT125ADR2G

Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
4
Number Of Bits Per Element
1
Current - Output High, Low
8mA, 8mA
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-55°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
14-SOIC (0.154", 3.90mm Width)
Logic Family
VHCT
Number Of Channels Per Chip
4
Polarity
Non-Inverting
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
High Level Output Current
- 8 mA
Low Level Output Current
8 mA
Maximum Power Dissipation
500 mW
Minimum Operating Temperature
- 55 C
Number Of Lines (input / Output)
4 / 3
Output Type
3-State
Propagation Delay Time
11.5 ns at 3.3 V, 7.5 ns at 5 V
Logic Device Type
Buffer, Non Inverting
Supply Voltage Range
4.5V To 5.5V
Logic Case Style
SOIC
No. Of Pins
14
Operating Temperature Range
-55°C To +125°C
Filter Terminals
SMD
Rohs Compliant
Yes
Family Type
VHCT
Logical Function
Buffer/Line Driver
Number Of Elements
4
Number Of Channels
4
Number Of Inputs
4
Number Of Outputs
4
Operating Supply Voltage (typ)
2.5/3.3/5V
Package Type
SOIC
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2V
Quiescent Current
2uA
Technology
CMOS
Pin Count
14
Mounting
Surface Mount
Operating Temp Range
-55C to 125C
Operating Temperature Classification
Military
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
MC74VHCT125ADR2G
MC74VHCT125ADR2GOSTR
DEVICE
UNDER
TEST
OE
Y
Y
A
Y
t
PLH
*Includes all probe and jig capacitance
*Includes all probe and jig capacitance
SWITCHING WAVEFORMS
OUTPUT
1.5V
DEVICE
UNDER
TEST POINT
TEST
Figure 4. Test Circuit
1.5V
http://onsemi.com
Figure 3. Test Circuit
1.5V
1.5V
1.5V
t
t
PZH
PZL
1 kW
Figure 2.
Figure 1.
C
L
*
t
t
5
PLZ
PHZ
OUTPUT
TEST POINT
CONNECT TO V
TESTING t
CONNECT TO GND WHEN
TESTING t
C
V
V
L
*
t
OL
OH
PHL
+ 0.3V
- 0.3V
PLZ
PHZ
3.0V
GND
HIGH
IMPEDANCE
HIGH
IMPEDANCE
AND t
AND t
GND
CC
3.0V
V
V
OH
OL
WHEN
PZL.
PZH.

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