PC28F640P33B85A NUMONYX, PC28F640P33B85A Datasheet - Page 35

IC FLASH 64MBIT 85NS 64EZBGA

PC28F640P33B85A

Manufacturer Part Number
PC28F640P33B85A
Description
IC FLASH 64MBIT 85NS 64EZBGA
Manufacturer
NUMONYX
Series
StrataFlash™r
Datasheet

Specifications of PC28F640P33B85A

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
64M (4M x 16)
Speed
85ns
Interface
Parallel
Voltage - Supply
2.3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TBGA
Cell Type
NOR
Density
64Mb
Access Time (max)
85ns
Interface Type
Parallel/Serial
Boot Type
Bottom
Address Bus
22b
Operating Supply Voltage (typ)
2.5/3/3.3V
Operating Temp Range
-40C to 85C
Package Type
EZBGA
Sync/async
Async/Sync
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.3V
Operating Supply Voltage (max)
3.6V
Word Size
16b
Number Of Words
4M
Supply Current
28mA
Mounting
Surface Mount
Pin Count
64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
888226
888226
PC28F640P33B85
PC28F640P33B85 888226

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PC28F640P33B85A
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Numonyx™ StrataFlash
Figure 19: Continuous Burst Read, showing an Output Delay Timing
Notes:
1.
2.
Figure 20: Synchronous Burst-Mode Four-Word Read Timing
Note:
November 2007
Order Number: 314749-05
Address [A]
Data [D/Q]
Address [A]
Data [D/Q]
ADV# [V]
WAIT [T]
ADV# [V]
OE# [G]
WAIT [T]
CLK [C]
CE# [E]
OE# [G]
WAIT is driven per OE# assertion during synchronous array or non-array read, and can be configured to assert either
during or one data cycle before valid data.
At the end of Word Line; the delay incurred when a burst access crosses a 16-word boundary and the starting address is
not 4-word boundary aligned. See
page 55
WAIT is driven per OE# assertion during synchronous array or non-array read. WAIT asserted during initial latency and
deasserted during valid data (RCR 10=0, WAIT asserted low).
CLK [C]
CE# [E]
for more information
R105
R105
R105
R105
R301
R301
R302
R303
R302
R303
R101
R101
R102
R102
®
A
Embedded Memory (P33)
R306
R306
R15
R106
R106
R15
R2
R3
R7
R2
R7
R3
Section 11.1.0.12, “End of Word Line (EOWL) Considerations” on
R4
R4
y
R307
R304
R307
R304
Q0
R312
R305
R305
R304
Q1
R305
R304
Q2
R305
R304
Q3
R17
R9
R10
R8
R304
R305
Datasheet
35

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