NUTINY-SDK-M0516 Nuvoton Technology Corporation of America, NUTINY-SDK-M0516 Datasheet - Page 239

• Manufacturer Part Number: NUTINY-SDK-M0516
• Description: BOARD EVAL NUMICRO M051 SERIES
• Manufacturer: Nuvoton Technology Corporation of America
• Series: NuMicro M051™r
• Type: MCUr

Specifications of NUTINY-SDK-M0516

• Contents: Board, Cable
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: M051™ Series, M052/M054/M058/M0516

6.7.5
NuMicro M051
In master/slave mode, the active level of device/slave select (SPISS) signal can be programmed
to low active or high active in SS_LVL bit (SPI_SSR [2]), but the SPISS0/1 is level trigger or edge
trigger which is defined in SS_LTRIG bit (SPI_SSR [4]). The serial clock (SPICLK) idle state can
be configured as high state or low state by setting the CLKP bit (SPI_CNTRL [11]). It also
provides the bit length of a transfer word in TX_BIT_LEN (SPI_CNTRL [7:3]), the transfer number
in TX_NUM (SPI_CNTRL [8]), and transmit/receive data from MSB or LSB first in LSB bit
(SPI_CNTRL [10]). Users also can select which edge of serial clock to transmit/receive data in
TX_NEG/RX_NEG (SPI_CNTRL [2:1]) registers. Four SPI timing diagrams for master/slave
operations and the related settings are shown from Figure 6.7-8 to Figure 6.7-11.
SPI Timing Diagram
™
Figure 6.7-8 SPI Timing in Master Mode
Series Technical Reference Manual
- 239 -
Publication Release Date: Sept 14, 2010
Revision V1.2