FT2232HQ-REEL FTDI, FT2232HQ-REEL Datasheet - Page 36

USB Interface IC USB HS to Dual UART/ FIFO/SPI/JTAG/I2C

FT2232HQ-REEL

Manufacturer Part Number
FT2232HQ-REEL
Description
USB Interface IC USB HS to Dual UART/ FIFO/SPI/JTAG/I2C
Manufacturer
FTDI
Datasheet

Specifications of FT2232HQ-REEL

Mounting Style
SMD/SMT
Package / Case
QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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4.8.1
To send fast serial data out of the FT2232H, the external device must drive the FSCLK clock. If the
FT2232H has data ready to send, it will drive FSDO output low to indicate the start bit. It will not do this
if it is currently receiving data from the external device. This is illustrated in Figure 4.14.
Figure 4.14 Fast Opto-Isolated Serial Interface Output Data
Notes :-
4.8.2
An external device is allowed to send data into the FT2232H if FSCTS is high. On receipt of a zero START
bit on FSDI, the FT2232H will drop FSCTS on the next positive clock edge. The data from bits 0 to 7 are
then clocked in (LSB first). The last bit (DEST) determines where the data will be written to. The data can
be sent to either channel A or to channel B. If DEST= „0‟, the data is sent to channel A, (assuming
channel A is enabled for fast serial mode, otherwise the data is sent to channel B). If DEST= „1‟ the data
is sent to channel B, (assuming channel B is enabled for fast serial mode, otherwise the data will go to
channel A. (Either channel A, channel B or both channels must be enabled as fast serial mode or the
function is disabled). This is illustrated in Figure 4.15.
Figure 4.15 Fast Opto-Isolated Serial Interface Input Data
Notes :-
FSCTS
FSCLK
FSDI
1. The first bit output (Start bit) is always 0.
2. FSDO is always sent LSB first.
3. The last serial bit output is the source bit (SRCE). It indicates which channel the data has come
4. If the target device is unable to accept the data when it detects the START bit, it should stop the
1. The first bit input (Start bit) is always 0.
2. FSDI is always received LSB first.
3. The last received serial bit is the destination bit (DEST).It indicates which channel the data should
4. The target device should ensure that CTS is high before it sends data. CTS goes low after data bit
FSCLK
FSDO
Outgoing Fast Serial Data
from. A „0‟ means that it has come from Channel A, a „1‟ means that it has come from Channel B.
FSCLK until it can accept the data.
Incoming Fast Serial Data
go to. A „0‟ means that it should go to channel A, a „1‟ means that it should go to channel B.
0 (D0) and stays low until the chip can accept more data.
Start
Bit
0
Start
Copyright © 2010 Future Technology Devices International Limited
Bit
0
D0
D0
D1
FT2232H DUAL HIGH SPEED USB TO MULTIPURPOSE UART/FIFO IC
D1
D2
D2
Data Bits - LSB first
D3
Data Bits - LSB first
D3
D4
D4
D5
D5
D6
D6
D7
D7
Destination
DEST
Bit
Source
SRCE
Bit
Document No.: FT_000061
Clearance No.: FTDI#77
Datasheet Version 2.10
36

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