ADXL210AQC-1 Analog Devices Inc, ADXL210AQC-1 Datasheet - Page 7

• Manufacturer Part Number: ADXL210AQC-1
• Description: IC ACCELEROMETER DUAL 14CERPAK
• Manufacturer: Analog Devices Inc

Specifications of ADXL210AQC-1

• Rohs Status: RoHS non-compliant
• Axis: X, Y
• Acceleration Range: ±10g
• Sensitivity: 100mV/g
• Voltage - Supply: 3 V ~ 5.25 V
• Output Type: Analog
• Bandwidth: 6kHz
• Mounting Type: Surface Mount
• Package / Case: 14-CerPak
• Interface: -

REV. B
Setting the Bandwidth Using C
The ADXL202/ADXL210 have provisions for bandlimiting the
X
implement low-pass filtering for antialiasing and noise reduc-
tion. The equation for the 3 dB bandwidth is:
or, more simply, F
The tolerance of the internal resistor (R
as 25% of its nominal value of 32 k ; so the bandwidth will
vary accordingly. A minimum capacitance of 1000 pF for C
is required in all cases.
Setting the DCM Period with R
The period of the DCM output is set for both channels by a
single resistor from R
is:
A 125 k resistor will set the duty cycle repetition rate to ap-
proximately 1 kHz, or 1 ms. The device is designed to operate at
duty cycle periods between 0.5 ms and 10 ms.
FILT
and Y
Table I. Filter Capacitor Selection, C
Bandwidth
10 Hz
50 Hz
100 Hz
200 Hz
500 Hz
5 kHz
FILT
C
DC
pins. Capacitors must be added at these pins to
F
–3 dB
–3 dB
SET
+3.0V TO +5.25V
OSCILLATOR
to ground. The equation for the period
Y SENSOR
X SENSOR
T 2
C
2 (32 k ) C(x, y)
5 F
(X ,Y )
V
DD
125 M
R
X
SET
SET
COM
and C
1
DEMOD
DEMOD
( )
V
Capacitor
Value
0.47 F
0.10 F
0.05 F
0.027 F
0.01 F
0.001 F
FILT
DD
Y
), can vary as much
R
32k
32k
R
Y
FILT
FILT
FILT
C
X
X
and C
X
C
ADXL202/
ADXL210
FILT
Figure 13. Block Diagram
Y
MODULATOR
Y
T2
CYCLE
(DCM)
DUTY
SELF TEST
(X, Y)
R
SET
–7–
Note that the R
analog output is desired. Use an R
and 2 M when taking the output from X
R
parasitic capacitance at this node.
Selecting the Right Accelerometer
For most tilt sensing applications the ADXL202 is the most
appropriate accelerometer. Its higher sensitivity (12.5%/g allows
the user to use a lower speed counter for PWM decoding while
maintaining high resolution. The ADXL210 should be used in
applications where accelerations of greater than 2 g are expected.
MICROCOMPUTER INTERFACES
The ADXL202/ADXL210 were specifically designed to work
with low cost microcontrollers. Specific code sets, reference
designs, and application notes are available from the factory.
This section will outline a general design procedure and discuss
the various trade-offs that need to be considered.
The designer should have some idea of the required perfor-
mance of the system in terms of:
Resolution: the smallest signal change that needs to be detected.
Bandwidth: the highest frequency that needs to be detected.
Acquisition Time: the time that will be available to acquire the
signal on each axis.
These requirements will help to determine the accelerometer
bandwidth, the speed of the microcontroller clock and the
length of the T2 period.
When selecting a microcontroller it is helpful to have a counter
timer port available. The microcontroller should have provisions
for software calibration. While the ADXL202/ADXL210 are
highly accurate accelerometers, they have a wide tolerance for
Y OUT
SET
X OUT
resistor should be place close to the T2 Pin to minimize
O
C
U
N
T
E
R
P
Table II. Resistor Values to Set T2
T2
1 ms
2 ms
5 ms
10 ms
SET
should always be included, even if only an
A( g ) = (T1/T2 – 0.5)/12.5%
0 g = 50% DUTY CYCLE
T2 = R
T1
SET
/125M
ADXL202/ADXL210
SET
T2
R
125 k
250 k
625 k
1.25 M
value between 500 k
SET
FILT
or Y
FILT
. The