CAT25080LI-G CATALYST SEMICONDUCTOR, CAT25080LI-G Datasheet - Page 3

• Manufacturer Part Number: CAT25080LI-G
• Description: IC, EEPROM, 8KBIT, SERIAL, 10MHZ, DIP-8
• Manufacturer: CATALYST SEMICONDUCTOR

Specifications of CAT25080LI-G

• Memory Size: 8Kbit
• Memory Configuration: 1K X 8 / 512 X 16
• Ic Interface Type: SPI
• Clock Frequency: 10MHz
• Supply Voltage Range: 1.8V To 5.5V
• Memory Case Style: DIP
• No. Of Pins: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4. AC Test Conditions:
5. This parameter is tested initially and after a design or process change that affects the parameter.
6. t
7. All Chip Select (CS) timing parameters are defined relative to the positive clock edge (Figure 2). t
8. t
Table 5. A.C. CHARACTERISTICS
Table 6. POWER−UP TIMING
for die revision C and higher. The die revision C is identified by letter “C” or a dedicated marking code on top of the package. For
previous product revision (Rev. B) the t
Doc. No. MD−1122 Rev.
t
WC
PUR
t
t
WC
RI
FI
Symbol
Symbol
Input Pulse Voltages: 0.3 V
Input rise and fall times: ≤ 10 ns
Input and output reference voltages: 0.5 V
Output load: current source I
(Note 5)
(Note 5)
t
t
t
is the time from the rising edge of CS after a valid write sequence to the end of the internal write cycle.
t
f
t
t
t
t
t
t
WPH
(Note 6)
PUW
t
t
CNH
WPS
SCK
t
t
t
t
t
CSS
CSH
CNS
PUR
and t
t
WH
DIS
SU
t
WL
HD
CD
HO
CS
t
HZ
LZ
H
V
PUW
are the delays required from the time V
HOLD to Output Low Z
HOLD Setup Time
HOLD Hold Time
HOLD to Output High Z
CS High Time
CS Setup Time
CS Hold Time
CS Inactive Setup Time
CS Inactive Hold Time
WP Setup Time
WP Hold Time
Clock Frequency
Data Setup Time
Data Hold Time
SCK High Time
SCK Low Time
Input Rise Time
Input Fall Time
Output Valid from Clock Low
Output Hold Time
Output Disable Time
Write Cycle Time
Power−up to Read Operation
Power−up to Write Operation
C).
CC
OL max
(Notes 5, 8)
to 0.7 V
Parameter
(T
/I
OH max
A
CC
= −40°C to +125°C, unless otherwise specified.) (Notes 4, 7)
CSH
CC
; C
is defined relative to the negative clock edge (please refer to data sheet
L
= 50 pF
Parameter
CC
http://onsemi.com
is stable until the specified operation can be initiated.
3
V
CC
Min
100
DC
40
40
75
75
10
50
20
30
20
20
10
0
0
= 1.8 V − 5.5 V
Max
100
50
75
50
5
2
2
5
T
V
Min
A
DC
20
20
40
40
10
20
15
20
15
15
10
60
CSH
CC
0
0
= −405C to +855C
= 2.5 V − 5.5 V
timing specification is valid
Max
1
1
Max
10
25
40
20
25
2
2
5
Units
ms
ms
Units
MHz
ms
ns
ns
ns
ns
ns
ms
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns