NRF9E5 NORDIC SEMICONDUCTOR, NRF9E5 Datasheet
NRF9E5
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NRF9E5 Summary of contents
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... ShockBurst , which automatically handles preamble, address and CRC. The circuit has embedded voltage regulators, which provides maximum noise immunity and allows operation on a single 1.9V to 3.6V supply. nRF9E5 is compatible with FCC standard CFR47 part 15 and ETSI EN 300 220-1. QUICK REFERENCE DATA ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC ORDERING INFORMATION Type number nRF9E5 IC nRF9E5-EVKIT 433 nRF9E5-EVKIT 868/915 Table 2 nRF9E5 ordering information. BLOCK DIAGRAM AIN3 (26) 4k byte RAM AIN2 (27) AIN1 (28) AIN0 (29) AREF (30) A/D converter VSS (5) PWM VSS (16) VSS (18) ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC TABLE OF CONTENTS 1 Architectural Overview .........................................................................................................5 1.1 Microcontroller .............................................................................................................5 1.2 PWM .............................................................................................................................6 1.3 SPI.................................................................................................................................6 1.4 Port Logic......................................................................................................................6 1.5 Power Management.......................................................................................................7 1.6 LF Clock, RTC Wakeup Timer, GPIO Wakeup and Watchdog...................................7 1.7 XTAL Oscillator ...........................................................................................................7 1.8 AD Converter................................................................................................................8 1 ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC 11.8 ADC – Configuration Register Contents ....................................................................41 11.9 ADC – Data Register Contents ...................................................................................41 11.10 Status Register Contents .........................................................................................41 12 Transceiver Subsystem Timing .......................................................................................42 12.1 Device Switching Times .............................................................................................42 TM 12.2 ShockBurst TX Timing ...........................................................................................42 TM 12.3 ShockBurst RX Timing ...
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... Register Map The SFRs (Special Function Registers) control several of the features of the nRF9E5. Most of the nRF9E5 SFRs are identical to the standard 8051 SFRs. However, there are additional SFRs that control features that are not available in the standard 8051. The SFR map is shown in Table 3. The registers with grey background are registers with industry standard 8051 behavior. Note that the function of P0, P1 and P2 are somewhat different from the “ ...
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... SPI nRF9E5 features a simple single buffered SPI (Serial Programmable Interface) master. The 3 data lines of the SPI bus (MISO, SCK and MOSI) are multiplexed (by writing to register SPI_CTRL) between the GPIO pins (lower 3 bits of P1) and the RF transceiver and AD subsystems. The SPI hardware does not generate any chip select signal. The programmer will typically use GPIO bits (from port P0) to act as chip selects for one or more external SPI devices ...
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... LF Clock, RTC Wakeup Timer, GPIO Wakeup and Watchdog The nRF9E5 contains an internal low frequency clock CKLF that is always on. When the crystal oscillator clocks the circuit, the CKLF is a 4kHz clock derived from the crystal oscillator. When no crystal oscillator clock is available, the CKLF is a low power RC oscillator that cannot be disabled will run continuously as long as VDD ≥ ...
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... The converter has 5 inputs selectable by software. Selecting one of the inputs will convert the voltage on the respective AIN0 to AIN3 pin. Input 4 enables software to monitor the nRF9E5 supply voltage by converting an internal input that is VDD/3 with the 1.22V internal reference selected. The AD converter is typically used in a start/stop mode ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC 2 ELECTRICAL SPECIFICATION Conditions: VDD = +3V, VSS = 0V, TEMP = -40ºC to +85ºC (typical +27ºC) Symbol Parameter (condition) Operating conditions VDD Supply voltage TEMP Operating temperature Digital input/output V HIGH level input voltage IH V LOW level input voltage ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC Symbol Parameter (condition) Receiver operation I Supply current in receive mode RX RX Sensitivity at 0.1%BER SENS RX Maximum received signal MAX C/I C/I Co-channel CO st C/I 1 adjacent channel selectivity C/I 200kHz 1ST nd C/I 2 adjacent channel selectivity C/I 400kHz ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC 2.1 Current Information for All Operating Modes MODE Light power down Moderate Power down Standby mode Deep Power Down MCU at 0.5MHz 3 volt MCU at 1MHz 3 volt MCU at 2MHz 3 volt MCU at 4MHz 3 volt ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC 3 PIN ASSIGNMENT P0.1/RXD 2 P0.2/TXD 3 P0.3/INT0_N 4 VDD 5 VSS 6 P0.4/INT1_N 7 P0.5/T0 8 P0.6/ Figure 2 Pin assignment nRF9E5. Main office: Nordic Semiconductor ASA - Vestre Rosten 81, N-7075 Tiller, Norway -Phone +4772898900 - Fax +4772898989 Revision: 1.3 ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC 4 PIN FUNCTION Pin Name Pin function 1 P01 Digital IN/OUT 2 P02 Digital IN/OUT 3 P03 Digital IN/OUT 4 VDD Power 5 VSS Power 6 P04 Digital IN/OUT 7 P05 Digital IN/OUT 8 P06 Digital IN/OUT 9 P07 Digital IN/OUT ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC 5 SYSTEM CLOCK The Microcontroller clock, CPU_CLK, is generated from the on chip crystal oscillator. CPU_CLK frequency is configured in the RF-configuration register (see chapter 11) and could be set to 0. 4MHz. CPU_CLK could in addition be set equal to the crystal oscillator frequency itself ...
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... Single Chip Transceiver with Embedded Microcontroller and ADC 6 DIGITAL I/O PORTS The nRF9E5 has two I/O ports located at the default locations for P0 and P1 in standard 8051, but the ports are fully bi-directional CMOS and the direction of each pin is controlled by a _DIR and an _ALT bit for each bit as shown in the table below. ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC Pin 10 P00 GTIMER Out P01 RXD Out P02 TXD Out P03 INT0_N In P04 INT1_N In P05 T0 In P06 T1 In P07 PWM Out Port 0 is controlled by SFR-registers 0x80, 0x93, 0x94 and 0x95 listed in the table below ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC Pin SPI_CTRL = 01 SCK SPI.clock MOSI SPI.dataout MISO SPI.datain EECSN P1.3 Port 1 is controlled by SFR-registers 0x90, 0x96 and 0x97, and only the 4 lower bits of the registers are used. Addr R/W #bit ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC 7 ANALOG INTERFACE 7.1 Crystal Specification Tolerance includes initially accuracy and tolerance over temperature and aging. Frequency C L 4MHz 8pF – 16pF 8MHz 8pF – 16pF 12MHz 8pF – 16pF 16MHz 8pF – ...
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... Digital Power De-Coupling nRF9E5 has internal regulator used for optimum performance and minimum power dissipation in digital part of the system. De-coupling of the regulated power is needed for proper operation of the chip. A capacitor of 10nF should be connected between DVDD_1V2 and ground as close to the chip as possible. Please see PCB layout and de- coupling guidelines for further information regarding layout ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC 8 INTERNAL INTERFACE; AD CONVERTER AND TRANSCEIVER 8 Radio General Purpose I/O Port The P2 port controls the transceiver. The P2 port uses the address normally used by port P2 in standard 8051. However since the radio transceiver is on chip, the port is not bi- directional. The power on default values in the port “ ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC 8.1.1 Controlling the Transceiver via SPI Interface. Normally the SPI hardware interface rather than GPIO programming will do the data transfers to the transceiver. Please see Table 33 SPI control and data SFR-registers for use of SPI interface. When SPI_CTRL is ‘ ...
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... Table 16 transceiver operational modes. 9.2 nRF ShockBurst™ Mode The nRF9E5 uses the Nordic Semiconductor ShockBurst™ feature. ShockBurst makes it possible to use the high data rate offered by the nRF905. By embedding all high speed signal processing related to RF protocol in the transceiver, the nRF905 offers the micro controller a simple SPI interface ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC TM 9.2.1 Typical ShockBurst 1. When the application MCU has data for a remote node, the address of the receiving node (TX-address) and payload data (TX-payload) are clocked into nRF905 via the SPI interface. The application protocol or MCU sets the speed of the interface. 2. MCU sets TRX_CE and TX_EN high, this activates a nRF905 ShockBurst™ ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC Radio in Standby TX_EN = HI PWR_UP = HI TRX_CE = LO SPI - programming uController loading ADDR and PAYLOAD data (Configuration register if changes since last TX/RX) TRX_CE YES Transmitter is powered up nRF ShockBurst TX Generate CRC and preamble Sending package ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC 9.2.2 Typical ShockBurstTM RX 1. ShockBurstTM RX is selected by setting TRX_CE high and TX_EN low. 2. After 650s nRF905 is monitoring the air for incoming communication. 3. When the nRF905 senses a carrier at the receiving frequency, Carrier Detect (CD) pin is set high ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC Radio in Standby TX_EN = LO PWR_UP = HI NO TRX_CE = HI ? YES Receiver is powered up Receiver Sensing for incomming data CD is set high if carrier NO Correct ADDR? YES AM is set high Receiving data Correct set low CRC? ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC 9.3 Standby Mode Standby mode is used to minimize average current consumption while not transmitting or receiving and still maintaining short start up times to ShockBurst TM ShockBurst TX. In this mode the crystal oscillator have to be active. The configuration word content is maintained during standby ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC 9.6 Output Frequency The operating RF-frequency of nRF905 is set in the configuration register by CH_NO and HFREQ_PLL. The operating frequency is given by 422 When HFREQ_PLL is ‘0’ the frequency resolution is 100kHz and when it is ‘1’ the resolution is 200kHz ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC 9.8 Address Match When the nRF905 is in ShockBurst high as soon as an incoming packet with an address that is identical with the device’s own identity is received. With the Address Match pin the controller is alerted that the nRF905 is receiving data actually before the Data Ready (DR) signal is set high ...
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... CHSEL in the ADC_CONFIG_REG. Values of CHSEL from would select AIN0 to AIN3 respectively. Setting CHSEL to [1xxx] will monitor the nRF9E5 supply voltage by converting an internal input that is VDD/3 with the 1.22V internal reference. The AD conversion result is available as ADCDATA in ADC_DATA_REG at the end of conversion ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC 10.2 AD Converter Usage 10.2.1 Measurements with External Reference When VFSSEL is set to 1 and CHSEL selects an input AINi (i.e. AIN0 to AIN3), the result in ADCDATA is directly proportional to the ratio between the voltage on the ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC 10.2.2 Measurements with Internal Reference When VFSSEL is set to 0 and CHSEL selects an input AINI (i.e. AIN0 to AIN3), the result in ADCDATA is directly proportional to the ratio between the voltage on the selected input and the internal bandgap reference (nominally 1.22V): ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC ADCCLK RACSN analog sampled EOC ADCDATA Figure 8 Timing diagram single step conversion. When ADCRUN is high the ADC is running continuously. Cycle time t between each conversion. EOC indicates every time a new conversion value is stored in ADC_DATA_REG ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC 11 TRANSCEIVER AND AD CONVERTER CONFIGURATION All configuration of the transceiver and AD converter subsystem is done via an internal SPI -interface of the two systems. The interface consists of 7 registers, a SPI instructions set is used to decide which operation shall be performed. The SPI-interface can only be activated when the transceiver is in standby mode ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC ADC – Data Register Register contains AD converter results. RF – Configuration Register Register contains transceiver setup information such as frequency and output power ext. TX – Address Register contains address of target device. How many bytes used is set in the configuration register. TX – ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC 11.2 SPI Instruction Set The available commands to be used on the SPI-interface are given in Table 21. Whenever CSN is set low the interface would expect an instruction. Every new instruction has to be presided by a high to low transaction on CSN. ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC 11.3 SPI Timing The internal SPI interface supports SPI mode 0. The device must be in one of the power saving modes for the configuration registers to be read or written to. CSN SCK MOSI C7 C6 ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC 11.4 RF – Configuration Register Description Parameter Bitwidth Description CH_NO 9 Sets center frequency together with HFREQ_PLL (default value = 001101100 HFREQ_ 1 Sets PLL in 433 or 868/915 MHz mode (default value = 0). PLL PA_PWR 2 Output power (default value = 00). ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC 11.5 ADC – Configuration Register Description Parameter Bitwidth Description 1 Positive edge of this signal will start one AD conversion when ADCRUN is CSTARTN inactive. This bit is internally synchronized to the ADC clock 1 ADC running continuously when active. ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC 11.7 RF – Configuration Register Contents RF CONFIG_REGISTER (R/W) Byte # Content bit[7:0], MSB = bit[ bit[7:6] not used, AUTO_RETRAN, RX_RED_PWR, PA_PWR[1:0], 2 bit[7] not used, TX_AFW[2:0] , bit[3] not used, RX_AFW[2:0] 3 bit[7:6] not used, RX_PW[5:0] ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC 11.8 ADC – Configuration Register Contents Byte # 0 Control: CHSEL[7:4], VFSSEL, PWR_UP, ADCRUN, CSTARTN 1 Static: bit[7:4] not used, ADC_RL_JUST, DIFFMODE, RESCTRL[1:0] 2 Table 29 ADC Configuration Register contents. 11.9 ADC – Data Register Contents ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC 12 TRANSCEIVER SUBSYSTEM TIMING The following timing must be obeyed during nRF905 operation. 12.1 Device Switching Times STBY TX ShockBurst™ STBY RX ShockBurst™ RX ShockBurst™ TX ShockBurst™ Notes to table switching is available without re-programming of the RF configuration register ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC TM 12.3 ShockBurst RX Timing Figure 14 Timing diagram for standby to receiving. After the Data Ready (DR) has been set high a valid data packet is available in the RX data register. This may be clocked out in Standby mode. After the data has been clocked out via the SPI interface the Data Ready (DR) and Address Match (AM) signals are reset to low ...
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... Single Chip Transceiver with Embedded Microcontroller and ADC 13 SPI nRF9E5 SPI is a simple single buffered master. The 3 data lines of the SPI bus (MISO, SCK and MOSI) are multiplexed (by writing to register SPI_CTRL) between the GPIO pins (lower 3 bits of P1) and the RF transceiver and AD converter subsystems. The SPI hardware does not generate any chip select signal ...
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... Single Chip Transceiver with Embedded Microcontroller and ADC 14 PWM The nRF9E5 PWM output is a one-channel PWM with a 2 register interface. The first register, PWMCON, enables PWM function and PWM period length, which is the number of clock cycles for one PWM period, as shown in the table below. The other register, PWMDUTY, controls the duty cycle of the PWM output signal ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC 15 INTERRUPTS nRF9E5 supports the following interrupt sources: Interrupt Natural Interupt signal Priority Vector INT0_N 1 0x03 TF0 2 0x0B INT1_N 3 0x13 TF1 4 0x1B 0x23 TF2 or 6 0x2B EXF2 int2 8 0x43 int3 9 0x4B ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC Table 37 explains the bit functions of the IE register Bit Function IE Global interrupt enable. Controls masking of all interrupts disables all interrupts (EA overrides individual interrupt enable bits). When each interrupt is enabled or masked by its individual enable bit (in this register or register EIE). ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC Table 39 explains the bit functions of the EXIF register. Bit Function EXIF.7 IE5 - Interrupt 5 flag. IE5 = 1 indicates that a rising edge was detected on the radio AM signal (see P2). IE5 must be cleared by software. Setting IE5 in software generates an interrupt, if enabled ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC Table 42 explains the bit functions of the EIP register. Bit Function EIP.7-5 Reserved. Read as 1. EIP.4 PWDI - Wakeup interrupt priority control. WDPI = 0 sets the wakeup interrupt (wdti) to low priority sets wakeup timer interrupt to high priority. ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC 15.5 Interrupt Sampling The internal timers and serial port generate interrupts by setting their respective SFR interrupt flag bits. The CPU samples external interrupts once per instruction cycle, at the rising edge of CPU_clk at the end of cycle C4. ...
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... For the maximum latency case, the response time 52clock cycles. 15.7 Interrupt Latency from Power Down State. The nRF9E5 may be set into Power Down state by writing a non zero value to SFR 0xB6, register CK_CTRL. The CPU will then perform a controlled shutdown of clock and power regulator depending on what mode was selected ...
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... Single Chip Transceiver with Embedded Microcontroller and ADC Startup Time From Reset 15.8 Single-Step Operation The nRF9E5 interrupt structure provides a way to perform single-step program execution. When exiting an ISR with an RETI instruction, the CPU will always execute at least one instruction of the task program. Therefore, once an ISR is entered, it cannot be re-entered until at least one program instruction is executed ...
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... LF CLOCK WAKEUP FUNCTIONS AND WATCHDOG 16.1 The LF Clock The nRF9E5 contains has an internal low frequency clock CKLF that is always active. When the crystal oscillator clocks the circuit, the CKLF is a 4kHz clock derived from the crystal oscillator (provided the CKLFCON register is set according to crystal frequency and prescaler ...
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... Programmable GPIO Wakeup Function Any number of the pins in port 0 may be used as wakeup signals for the nRF9E5. The device may be programmed to react on either rising or falling or both edges of each pin individually. Additionally each pin is equipped with a programmable “filter” that can be used for glitch suppression ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC Filter selection Debounce WCON [1:0] Number of clock pulses Table 44 GPIO wakeup filter configuration. 16.5 Watchdog The watchdog is activated on the first write to its control register SFR 0xAD. It can not be disabled by any other means than a reset. The watchdog register is loaded by writing a 16-bit value to the two 8-bit data registers (SFR 0xAB and 0xAC) and then the writing the correct opcode to the control register ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC Typical sequences are: Write: Wait until REGX_CRTL (i.e. not busy) Write REGX_MSB, Write REGX_LSB, Write REGX_CTRL Read: Wait until REGX_CRTL (i.e. not busy) Write REGX_CTRL, Wait until REGX_CRTL (i.e. not busy) ...
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... Edge filter for P04 Table 47 Bit fields in register WWCON1 and WWCON0. 16.7 Reset The nRF9E5 can be reset either by the on-chip power-on reset circuitry or by the on- chip watchdog counter. 16.7.1 Power-on Reset The power-on reset circuitry keeps the chip in power-on-reset state until the supply voltage reaches VDDmin (a voltage, less than 1 ...
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... Single Chip Transceiver with Embedded Microcontroller and ADC 16.7.2 Watchdog Reset If the Watchdog reset signal goes active, nRF9E5 enters the same reset sequence as for power-on reset. That is, the internal voltage generators and oscillators start up, the SFRs are initialized to their reset values, as listed in Table 62, and thereafter the CPU begins program execution at the standard reset vector address 0x0000. The startup time from watchdog reset is somewhat shorter ...
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... The CPU executes the ISR associated with the received interrupt. The RETI instruction at the end of the ISR returns the CPU to the instruction following the one that put the nRF9E5 into idle mode. A watchdog reset causes the nRF9E5 to exit idle mode, reset internal registers, execute its reset sequence and begin program execution at the standard reset vector address 0x0000 ...
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... CPU executes the ISR associated with that interrupt immediately after power and clocks are restored. The RETI instruction at the end of the ISR returns the CPU to the instruction following the one that put the nRF9E5 into power down mode. A watchdog reset causes the nRF9E5 to exit power down mode, reset internal registers, execute its reset sequence and begin program execution at the standard reset vector address 0x0000 ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC 17.2.1 Startup Time From Reset Startup time consists of a number of LP_OSC cycles + a number of XTAL clock cycles. f may vary from 1 to 5.5kHz over voltage and temperature. LP_OSC Startup times are summarized in the table below: ...
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... Figure 17 Memory Map and Organization. 18.1.1 Program Memory/Data Memory The nRF9E5 has 4k bytes of program memory available for user programs located at the bottom of the address space as shown in Figure 17. This memory also function as a random access memory and can be accessed with the movx and movc instructions. ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC address space is separate and is differentiated by the type of addressing. Direct addressing accesses the SFRs, while indirect addressing accesses the upper 128 bytes of RAM. Most SFRs are reserved for specific functions, as described in 18.6 Special Function Registers on page 71 ...
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... However, the timing of the instructions is different, both in terms of number of clock cycles per instruction cycle and timing within the instruction cycle. Table 55 to Table 60 lists the nRF9E5 instruction set and the number of instruction cycles required to complete each instruction. Symbol ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC Mnemonic Description ADD A, Rn Add register to A ADD A, direct Add direct byte to A ADD A, @Ri Add data memory to A ADD A, #data Add immediate to A ADDC A, Rn Add register to A with carry ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC Mnemonic Description ANL A, Rn AND register to A ANL A, direct AND direct byte to A ANL A, @Ri AND data memory to A ANL A, #data AND immediate to A ANL direct, A AND A to direct byte ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC Mnemonic Description CLR C Clear carry CLR bit Clear direct bit SETB C Set carry SETB bit Set direct bit CPL C Complement carry CPL bit Complement direct bit ANL C, bit AND direct bit to carry ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC Mnemonic Description MOV A, Rn Move register to A MOV A, direct Move direct byte to A MOV A, @Ri Move data memory to A MOV A, #data Move immediate to A MOV Rn, A Move A to register MOV Rn, direct ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC Mnemonic Description ACALL addr 11 Absolute call to subroutine LCALL addr 16 Long call to subroutine RET Return from subroutine RETI Return from interrupt AJMP addr 11 Absolute jump unconditional LJMP addr 16 Long jump unconditional ...
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... RAM or peripherals. The nRF9E5 maintains the standard data pointer as DPTR0 at SFR locations 0x82 and 0x83 not necessary to modify code to use DPTR0. The nRF9E5 adds a second data pointer (DPTR1) at SFR locations 0x84 and 0x85. The SEL bit in the DPTR Select register, DPS (SFR 0x86), selects the active pointer ...
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... SFRs and indicates which SFRs are not included in the standard 8051 SFR space. When writing software for the nRF9E5, use equate statements to define the SFRs that are specific to the nRF9E5 and custom peripherals. In Table 61, SFR bit positions that contain cannot be written to and, when read, always return the value shown (0 or 1). SFR bit positions that contain “ ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC Addr Register Bit 7 0x80 P0(3) 0x81 SP 0x82 DPL0 0x83 DPH0 0x84 DPL1(1) 0x85 DPH1(1) 0x86 DPS(1) 0 0x87 PCON SMOD 0x88 TCON TF1 0x89 TMOD GATE 0x8A TL0 0x8B TL1 0x8C ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC Register Addr ACC 0xE0 B 0xF0 CK_CTRL 0xB6 CKCON 0x8E CKLFCON 0xBF DPH0 0x83 DPH1 0x85 DPL0 0x82 DPL1 0x84 DPS 0x86 EICON 0xD8 EIE 0xE8 EIP 0xF8 EXIF 0x91 HWREV ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC Table 63 lists the functions of the bits in the PSW register. Bit Function PSW Carry flag. Set to 1 when last arithmetic operation resulted in a carry (during addition) or borrow (during subtraction); otherwise cleared all arithmetic operations ...
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... Single Chip Transceiver with Embedded Microcontroller and ADC 18.7 SFR Registers Unique to nRF9E5 The table below lists the SFR registers that are unique to nRF9E5 (not part of standard 8051 register map) The registers P0, P1 and P2 (radio) use the addresses for the ports P0, P1 and standard 8051 ...
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... Single Chip Transceiver with Embedded Microcontroller and ADC 18.8 Timers/Counters The nRF9E5 includes three timer/counters (Timer 0, Timer 1 and Timer 2). Each timer/counter can operate as either a timer with a clock rate based on the CPU clock , event counter clocked by the t0 pin (Timer 0), t1 pin (Timer 1), or the T2 pin (Timer 2) ...
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... INT0_N pin is low and cleared when the INT0_N pin is high. In level-sensitive mode, software cannot write to IE0. TCON.0 IT0 - Interrupt 0 type select. When IT1 = 1, the nRF9E5 detects external interrupt INT0_N on the falling edge (edge-sensitive). When IT1 = 0, the nRF9E5 detects INT0_N as a low level (level-sensitive). Table 66 TCON Register – SFR 0x88. 18.8.1.1 Mode 0 Mode 0 operation, illustrated in Figure 18, is the same for Timer 0 and Timer 1. In mode 0, the timer is configured as a 13-bit counter that uses bits 0– ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC Divide by 12 CPU_CLK Divide by 4 P05/T0 (P06/T1) TR0 (TR1) GATE P03/INT0_N (P04/INT1_N) P0_ALT.3 (P0_ALT.4) Figure 18 Timer 0/1 – Modes 0 and 1. 18.8.1.3 Mode 2 Mode 2 operation is the same for Timer 0 and Timer 1. In mode 2, the timer is configured as an 8-bit counter, with automatic reload of the start value ...
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... Timer 1 GATE function is also available when Timer mode 3. 18.8.2 Timer Rate Control The default timer clock scheme for the nRF9E5 timers is twelve CPU clock cycles per increment, the same as in the standard 8051. However, in the nRF9E5, the instruction cycle is four clock cycles. ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC all three timers is 0; that is, twelve-clock intervals. These bits have no effect in counter mode. Bit Function CKCON.7,6 Reserved CKCON.5 T2M – Timer 2 clock select. When T2M = 0, Timer 2 uses CPU_clk/12 (for compatibility with 80C32); when T2M = 1, Timer 2 uses CPU_clk/4. This bit has no effect when Timer 2 is configured for baud rate generation ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC Bit Function T2CON.7 TF2 - Timer 2 overflow flag. Hardware will set TF2 when Timer 2 overflows from 0xFFFF. TF2 must be cleared the software. TF2 will only be set RCLK and TCLK are both cleared to 0. Writing TF2 forces a Timer 2 interrupt if enabled. ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC CPU_CLK SCK/T2 TR2 EXEN2 LP_OSC Figure 21 Timer 2 – Timer/Counter with Capture. 18.8.3.3 16-Bit Timer/Counter Mode with Capture The Timer 2 capture mode, illustrated in Figure 21 Timer 2 – Timer/Counter with Capture, is the same as the 16-bit timer/counter mode, with the addition of the capture registers and control signals ...
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... In asynchronous mode, the serial port operates in full-duplex mode. In all modes, the nRF9E5 buffers receive data in a holding register, enabling the UART to receive an incoming word before the software has read the previous value. ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC Mode Sync/As Baud Clock ync 0 Sync CPU_clk/4 CPU_clk/12 1 Async Timer 1 or Timer 2 2 Async CPU_clk/32 CPU_clk/64 3 Async Timer 1 or Timer 2 The SFRs associated with the serial port are: - SCON – SFR 0x98 – Serial port control (Table 71) - SBUF – ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC The lack of open drain ports on nRF9E5 makes it a programmer responsibility to control the direction of the RXD pin. The serial mode 0 baud rate is either CPU_clk/12 or CPU_clk/4, depending on the state of the SM2. When SM2 = 0, the baud rate is CPU_clk/12; when SM2 = 1, the baud rate is CPU_clk/4 ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC 18.9.2 Mode 1 Mode 1 provides standard asynchronous, full-duplex communication, using a total of ten bits: one start bit, eight data bits, and one stop bit. For receive operations, the stop bit is stored in RB8. Data bits are received and transmitted LSB first. ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC Desired SMOD Baud Rate 19.2 Kb/s 1 9.6 Kb/s 1 4.8 Kb/s 1 0.4 Kb/s 1 1.2 Kb/s 1 Table 72 Timer 1 Reload Values for Serial Port Mode 1 Baud Rates. To use Timer 2 as the baud-rate generator, configure Timer 2 in auto-reload mode and set the TCLK and/or RCLK bits in the T2CON SFR. TCLK selects Timer 2 as the baud- rate generator for the transmitter ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC 18.9.2.2 Mode 1 Transmit Figure 28 illustrates the mode 1 transmit timing. In mode 1, the UART begins transmitting after the first rollover of the divide-by-16 counter after the software writes to the SBUF register. The UART transmits data on the TXD pin in the following order: start bit, eight data bits (LSB first), stop bit ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC For noise rejection, the serial port establishes the content of each received bit by a majority decision of three consecutive samples in the middle of each bit time. This is especially true for the start bit. If the falling edge on RXD is not verified by a majority decision of three consecutive samples (low), then the serial port stops reception and waits for another falling edge on RXD ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC Write to SBUF0 TX CLK SHIFT START D0 TXD TI RI Figure 30 Serial port Mode 2 Transmit Timing. Main office: Nordic Semiconductor ASA - Vestre Rosten 81, N-7075 Tiller, Norway -Phone +4772898900 - Fax +4772898989 Revision: 1 Page 90 of 108 ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC 18.9.3.2 Mode 2 Receive Figure 31 illustrates the mode 2 receive timing. Reception begins at the falling edge of a start bit received on RXD, when enabled by the REN bit. For this purpose, RXD is sampled sixteen times per bit for any baud rate. When a falling edge of a start bit is detected, the divide-by-16 counter used to generate the receive clock is reset to align the counter rollover to the bit boundaries ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC Write to SBUF0 TX CLK SHIFT START D0 TXD TI RI Figure 32 Serial port Mode 3 Transmit Timing. RX CLK START D0 RXD Bit detector sampling SHIFT TXD TI RI Figure 33 Serial port Mode 3 Receive Timing. Main office: Nordic Semiconductor ASA - Vestre Rosten 81, N-7075 Tiller, Norway -Phone +4772898900 - Fax +4772898989 Revision: 1 ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC 18.9.5 Multiprocessor Communications The multiprocessor communication feature is enabled in modes 2 and 3 when the SM2 bit is set in the SCON SFR for a serial port. In multiprocessor communication mode, the 9th bit received is stored in RB8 and, after the stop bit is received, the serial port interrupt is activated only if RB8 = 1 ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC 19 PACKAGE OUTLINE nRF9E5 uses the QFN 32L 5x5 green package with a mat tin finish. Dimensions are in mm. Recommended soldering reflow profile can be found in application note nAN400- 08, QFN soldering reflow guidelines, www.nordicsemi.no. ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC Package marking Figure 35 nRF9E5 package marking layout Abbreviations: DDDDDD – Product number, e.g. 9E5 B – Build Code, i.e. unique code for silicon revision, production site, package type and test platform X – ...
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... Long power supply lines on the PCB should be avoided. All device grounds, VDD connections and VDD bypass capacitors must be connected as close as possible to the nRF9E5 IC. For a PCB with a topside RF ground plane, the VSS pins should be connected directly to the ground plane. For a PCB with a bottom ground plane, the best technique is to place via holes as close as possible to the VSS pins ...
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... SO HOLD SCK 4 5 VSS SI R6 100K 25XX320 Figure 36 nRF9E5 application schematic, differential connection to a loop antenna Main office: Nordic Semiconductor ASA - Vestre Rosten 81, N-7075 Tiller, Norway -Phone +4772898900 - Fax +4772898989 Revision: 1.3 aaaaaaaa R3 AREF 1K AIN3 AIN2 AIN1 AIN0 C7 10nF R5 47K ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC Component Description C1 NP0 ceramic chip capacitor, (Crystal oscillator) C2 NP0 ceramic chip capacitor, (Crystal oscillator) C3 NP0 ceramic chip capacitor, (PA supply decoupling) C4 X7R ceramic chip capacitor, (PA supply decoupling) C5 NP0 ceramic chip capacitor, (Supply decoupling) ...
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... There is no ground plane beneath the antenna. a) Top silk screen c) Top view Figure 37 PCB layout example for nRF9E5, differential connection to a loop antenna. Main office: Nordic Semiconductor ASA - Vestre Rosten 81, N-7075 Tiller, Norway -Phone +4772898900 - Fax +4772898989 Revision: 1.3 No components in bottom layer ...
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... It is recommended to add pull up or pull down resistors on signals that can enter a floating state. For the nRF9E5 it is recommended to have pull down on the MISO signal. Main office: Nordic Semiconductor ASA - Vestre Rosten 81, N-7075 Tiller, Norway -Phone +4772898900 - Fax +4772898989 Revision: 1 ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC Component Description C1 NP0 ceramic chip capacitor, (Crystal oscillator) C2 NP0 ceramic chip capacitor, (Crystal oscillator) C3 NP0 ceramic chip capacitor, (PA supply decoupling) @ 433MHz @ 868 @ 915MHz C4 X7R ceramic chip capacitor, (PA supply decoupling) C5 NP0 ceramic chip capacitor, (Supply decoupling) ...
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... A large number of via holes connect the top layer ground areas to the bottom layer ground plane. a) Top silk screen c) Top view Figure 40 PCB layout example for 433MHz operating nRF9E5, single ended connection to 50 antenna by using a differential to single ended matching network. a) Top silk screen c) Top view Figure 41 PCB layout example for 868-915MHz operating nRF9E5, single ended connection to 50 antenna by using a differential to single ended matching network ...
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... Single Chip Transceiver with Embedded Microcontroller and ADC 21.5 Configure the Chip as nRF905. nRF9E5 is easily configurable as nRF905. Upon power up the boot loader is run. If MISO is set to low value during the first 10ms, the microcontroller configures itself to nRF905 mode. With the exception of pin 3 (UPCLK), all pins are then defined as for the nRF905 device ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC 22 ABSOLUTE MAXIMUM RATINGS Supply Voltage VDD.............................. - 0. 3.6V VSS .....................................................0V Input Voltage For analog pins, AIN0 to AIN3 and AREF: V ........................- 0.3V to VDD + 2.0V IA For all other pins: V ..........................- 0.3V to VDD + 0.3V I Output Voltage V .........................- 0.3V to VDD + 0.3V ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC 23 GLOSSERY OF TERMS Term ADC AM BOM CD CLK CRC CSN DR GFSK GPIO ISM ksps MCU MISO MOSI PWM PWR_DWN PWR_UP RAM ROM RTC RX SCK SPI STBY TRX_EN TX TX_EN UART XTAL Main office: Nordic Semiconductor ASA - Vestre Rosten 81, N-7075 Tiller, Norway -Phone +4772898900 - Fax +4772898989 Revision: 1 ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC 24 DEFINITIONS Product Specification Identification Objective Product Specification Preliminary Product Specification Product Specification Obsolete Product Specification Nordic Semiconductor ASA reserves the right to make changes without further notice to the product to improve reliability, function or design. Nordic Semiconductor does not assume any liability arising out of the application or use of any product or circuits described herein ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC 25 YOUR NOTES Main office: Nordic Semiconductor ASA - Vestre Rosten 81, N-7075 Tiller, Norway -Phone +4772898900 - Fax +4772898989 Revision: 1.3 Page 107 of 108 June 2006 ...
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... PRODUCT SPECIFICATION nRF9E5 Single Chip Transceiver with Embedded Microcontroller and ADC Nordic Semiconductor ASA – World Wide Distributors For Your nearest dealer, please see http://www.nordicsemi.no Vestre Rosten 81, N-7075 Tiller, Norway Phone: + 00, Fax: + Visit the Nordic Semiconductor ASA website at http://www.nordicsemi.no Main office: Nordic Semiconductor ASA - Vestre Rosten 81, N-7075 Tiller, Norway -Phone +4772898900 - Fax +4772898989 Revision: 1 ...