AS5046ASSU austriamicrosystems, AS5046ASSU Datasheet - Page 25

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AS5046ASSU

Manufacturer Part Number
AS5046ASSU
Description
IC, MAGNETIC ROTARY ENCODER 12BIT SSOP16
Manufacturer
austriamicrosystems
Type
Magnetic Rotary Encoderr
Datasheet

Specifications of AS5046ASSU

Ic Function
Encoder IC
Supply Voltage Range
3V To 3.6V, 4.5V To 5.5V
Operating Temperature Range
-40°C To +125°C
Digital Ic Case Style
SSOP
No. Of Pins
16
Filter Terminals
SMD
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AS5046 Programmable 360° Magnetic Angle Encoder – Preliminary Data Sheet
12.3 Repeated OTP Programming
Although a single AS5046 OTP register bit can be
programmed only once (from 0 to 1), it is possible to
program other, unprogrammed bits in subsequent
programming cycles. However, a bit that has already
been programmed should not be programmed twice.
Therefore it is recommended that bits that are already
programmed are set to “0” during a programming cycle.
12.4 Non-permanent Programming
It is also possible to re-configure the AS5046 in a non-
permanent way by overwriting the OTP register.
This procedure is essentially a “Write Data” sequence
(see Figure 13) without a subsequent OTP programming
cycle.
The “Write Data” sequence may be applied at any time
during normal operation. This configuration remains set
while the power supply voltage is above the power-on
reset level (see 5.5).
See Application Note AN5000-20 for further information.
12.5 Digital-to-Analog Converter (DAC)
The DAC has a resolution of 10bit (1024 steps) and can
be configured for the following options
Internal or external reference
The default DAC reference is the voltage at pin #16
(VDD5V) divided by 2 (see Figure 17). Using this
reference, a system that has an output voltage
ratiometric to the supply voltage can be built.
Optionally, an external reference source, applied at pin#9
(DACref) can be used. This programming option is useful
for applications requiring a precise output voltage that is
independent of supply fluctuations, for current sink
outputs or for applications with a dynamic reference, e.g.
attenuation of audio signals.
0-100% or 10-90% full scale range
The reference voltage for the DAC is buffered internally.
The recommended range for the external reference
voltage is 0.2V to (VDD3V3 -0.2)V.
The DAC output voltage will be switched to 0V, when the
magnetic field is out of range, when the MagInc and
MagDec indicators are both =1 and the MagRngn-pin (#1)
will go low.
Revision 1.1
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The default full scale output voltage range is 0-
100%*VDD5V. Due to limitations in the output stage of
an OP-Amp buffer, it cannot drive the output voltage from
0-100% rail-to-rail. Without load, the minimum output
voltage at 0° will be a few millivolts higher than 0V and
the maximum output voltage will be slightly lower than
VDD5V. With increasing load, the voltage drops will
increase accordingly.
As a programming option, an output range of 10-
90%*VDD5V can be selected. In this mode, there is no
saturation at the upper and lower output voltage limits
like in the 0-100% mode and it allows failure detection as
the output voltage will be outside the 10-90% limits,
when the magnetic field is in the “red” range (V
see Table 7) or when the supply to the chip is interrupted
(V
The unbuffered output of the DAC is accessible at pin
#10 (DACout). This output must not be loaded.
12.6 OP-AMP Stage
The DAC output is buffered by a non-inverting Op-Amp
stage. The amplifier is supplied by VDD5V (pin #16) and
can hence provide output voltages up to 5V.
By allowing access to the inverting input of the Op-Amp
and with the addition of a few discrete components it can
be configured in many ways, like high current buffer,
current sink output, adjustable angle range, etc...
Per default, the gain of the Op-Amp must be set by two
external resistors (see Figure 17). Optionally, the fixed
internal gain setting (2x) may be programmed by OTP,
eliminating the need for external resistors.
12.6.1
The Noise level at the analog output depends on two
states of the digital angular output:
out
=0V or VDD5V).
a)
b)
V
Output Noise
the digital angular output value is stable
In this case, the output noise is the figure given
as V
level is given for the default gain of 2x For
other gains, it must be scaled accordingly.
the digital output is at the edge of a step
In this case, the digital output may jitter
between two adjacent values. The rate of jitter
is specified as transition noise (parameter TN
in paragraph 5.5). The resulting output noise is
calculated by:
noise
noise
,
Vout
in paragraph 0. Note that the noise
=
TN
360
VDD
5
V
+
V
noise
,
OPAMP
Page 25 of 33
out
=0V,

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