MB85RC128PNF-G-JNE1 Fujitsu, MB85RC128PNF-G-JNE1 Datasheet - Page 9

IC, MEMORY, FRAM, 128K, 12C, 8SOP

MB85RC128PNF-G-JNE1

Manufacturer Part Number
MB85RC128PNF-G-JNE1
Description
IC, MEMORY, FRAM, 128K, 12C, 8SOP
Manufacturer
Fujitsu
Datasheet

Specifications of MB85RC128PNF-G-JNE1

Memory Size
128Kbit
Access Time
900ns
Supply Voltage Range
2.7V To 3.6V
Memory Case Style
SOP
No. Of Pins
8
Operating Temperature Range
-40°C To +85°C
Interface
I2C, Serial, 2 Wire
Memory
RoHS Compliant
Memory Configuration
16K X 8
Nvram Features
I2C Bus Specification Version 2.1 Compliant, Fully Controllable By SCL And SDA Ports
Interface Type
I2C, Serial, 2-Wire
Rohs Compliant
Yes
DS05-13110-1E
• Current Address Read
When the previous write or read operation finishes successfully up to the stop command and if the last accessed
address is taken to be “n”, then the address at “n+1” is read by sending the following command unless turning
the power off. If the end of the address range is reached internally, the address counter will roll over to 0000
The current address is undefined immediately after the power is turned on.
• Random Read
The one byte of data at the address as saved in the buffer can be read out synchronously to SCL by specifying
the address in the same way as for a write, and then issuing another start condition and sending the Control
Byte (R/W) = 1.
The final NACK is issued by the receiver that receives the data. In this case, this bit is issued by the master side.
S
1 0 1 0
S
1 0 1 0
A2 A1 A0
A2 A1 A0
0
A
High 8bits
Address
1
A
(n+1) address
Data 8bits
A
Read
Low 8bits
Address
N P
A
S
1 0 1 0
A
S
P
N
A2 A1 A0
A
S
P
N
ACK
Access from slave
Access from master
Start Condition
Stop Condition
NACK
Access from slave
ACK
Access from master
Start Condition
Stop Condition
NACK
MB85RC128
1
A
n address
Data 8bits
Read
N
P
H
9
.

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