CS5102A-BL Cirrus Logic Inc, CS5102A-BL Datasheet - Page 6

• Manufacturer Part Number: CS5102A-BL
• Description: A/D Converter (A-D) IC
• Manufacturer: Cirrus Logic Inc

Specifications of CS5102A-BL

• Input Channels Per Adc: 2
• Mounting Type: Surface Mount
• No. Of Channels: 2
• Power Rating: 44mW
• Supply Voltage Min: 4.5V
• Peak Reflow Compatible (260 C): No
• Sample Rate: 20kSPS
• Supply Voltage Max: 5.5V
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

SWITCHING CHARACTERISTICS, CS5101A
(TA = TMIN to TMAX; VA+, VD+ = 5V ±10%; VA-, VD- = -5V ±10%; Inputs: Logic 0 = 0V, Logic 1 = VD+; C
Notes:
6
CLKIN Period
CLKIN Low Time
CLKIN High Time
Crystal Frequency
SLEEP Rising to Oscillator Stable
RST Pulse Width
RST to STBY falling
RST Rising to STBY Rising
CH1/2 Edge to TRK1, TRK2 Rising
CH1/2 Edge to TRK1, TRK2 Falling
HOLD to SSH Falling
HOLD to TRK1, TRK2 Falling
HOLD to TRK1, TRK2, SSH Rising
HOLD Pulse Width
HOLD to CH1/2 Edge
HOLD Falling to CLKIN Falling
12. External loading capacitors are required to allow the crystal to oscillate. Maximum crystal frequency is 8.0 MHz in
13. With an 8.0 MHz crystal, two 10 pF loading capacitors and a 10 MΩ parallel resistor (see Figure 9).
14. These timings are for FRN mode.
15. SSH only works correctly if
16. When
FRN mode (100 kSps).
HOLD
by a falling edge of CLLKIN. Conversion will begin on the next rising edge of CLKIN after
is operated synchronous to CLKIN, the
if CLKIN falls 95 ns after
HOLD
rises to 64t
goes low, the analog sample is captured immediately. To start conversion,
Parameter
clk
after
HOLD
HOLD
HOLD
falls. This ensures that the HOLD pulse will meet the minimum specification for t
has fallen. These timings are for PDT and RBT modes.
falling edge is within +15 to +30 ns of CH1/2 edge or if CH1/2 edge occurs after
HOLD
(Note 12)
(Note 13)
(Note 14)
(Note 14)
(Note 15)
(Note 15)
(Note 15)
(Note 16)
(Note 15)
(Note 16)
pulse width may be as narrow as 150 ns for all CLKIN frequencies
Symbol
t
t
t
t
t
t
drsh1
dfsh4
dfsh2
dfsh1
t
t
t
f
t
t
t
t
drsh
hold
dhlri
clkh
t
drrs
clkl
xtal
cal
hcf
clk
rst
-
1t
66t
37.5
37.5
clk
Min
108
150
2.0
15
95
-
-
-
-
-
-
-
+20
clk
CS5101A CS5102A
11,528,160
Typ
100
120
80
60
2
-
-
-
-
-
-
-
-
-
-
HOLD
HOLD
L
68t
68t
is latched. If
= 50 pF).
1t
10,000
9.216
63t
64t
must be latched
Max
clk
clk
clk
-
-
-
-
-
-
-
-
-
+260
+260
+10
clk
clk
DS45F6
HOLD
MHz
Unit
ms
t
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
clk
hcf
.