CS5501-BS Cirrus Logic Inc, CS5501-BS Datasheet - Page 26

• Manufacturer Part Number: CS5501-BS
• Description: A/D Converter (A-D) IC
• Manufacturer: Cirrus Logic Inc

Specifications of CS5501-BS

• Peak Reflow Compatible (260 C): No
• No. Of Bits: 16 Bit
• Leaded Process Compatible: No
• Mounting Type: Surface Mount
• Interface Type: Serial
• Package / Case: 20-SOIC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

age reference, and the analog signal conditioning
circuitry from the same primary source. If sepa-
rate supplies are used, it is recommended that the
CS5501/CS5503 be powered up first. If a com-
mon power source is used for the analog signal
conditioning circuitry as well as the A/D con-
verter, this power source should be applied
before application of power to the digital logic
supply.
The CS5501/CS5503 exhibit good power supply
rejection for frequencies within the passband (dc
to 10 Hz). Any small offset or gain error caused
by long term drift of the power supplies can be
26
0
±VREF
Analog
Source
Analog
Analog
Signal
Supply
Supply
or
+5V
-5V
VREF
Analog
Supply
+5V
* Recommended to
frequency noise
Input Select
Calibration
reduce high
Reference
Unipolar
Bipolar/
Control
Voltage
0.0047 F NPO
0.1 F
200
0.1 F
+2.5V
Figure 15. Typical Connection Diagram
13
17
12
10
4
9
8
CAL
SC1
SC2
BP/UP
AIN
VREF
AGND
VA+
VA-
14
7
CS5501
CS5503
10
10
CLKOUT
SLEEP
SDATA
MODE
CLKIN
DGND
DRDY
removed by recalibration. Above 10 Hz the digi-
tal filter will provide additional rejection. When
the benefits of the digital filter are added to the
regular power supply rejection the effects of line
frequency variations (60 Hz) on the power sup-
plies will be reduced greater than 120 dB. If the
supply voltages for the CS5501/CS5503 are gen-
erated with a dc-dc converter the operating
frequency of the dc-dc converter should not oper-
ate at the sampling frequency of the
CS5501/CS5503 or at integer multiples thereof.
At these frequencies the digital filter will not aid
in power supply rejection. See Anti-Alias Consid-
erations section of this data sheet.
VD+
VD-
SCLK
15
CS
6
0.1 F
0.1 F
11
19
20
18
16
3
2
1
5
Mode Select
Sleep Mode
Optional
Interface
Source
Control
Control
Output
Clock
Serial
Logic
Data
Unused Logic Inputs
must be connected
CS5501/CS5503
to DGND or VD+
DS31F2