DSPIC30F4011T-30I/PT Microchip Technology, DSPIC30F4011T-30I/PT Datasheet - Page 6

• Manufacturer Part Number: DSPIC30F4011T-30I/PT
• Description: IC,DSP,16-BIT,CMOS,TQFP,44PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F4011T-30I/PT

• Rohs Compliant: YES
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 30
• Program Memory Size: 48KB (16K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With: AC30F006 - MODULE SKT FOR DSPIC30F 44TQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: DSPIC30F4011T30IP

dsPIC30F4011/4012
5. Module: CPU
EXAMPLE 4:
DS80454D-page 6
LOOP1: MOV
LOOP0: MOV
Note:
When using two DO loops in a nested fashion,
terminating the inner-level DO loop by setting the
EDT bit (CORCON<11>) will produce unexpected
results. Specifically, the device may continue
executing code within the outer DO loop forever.
This erratum does not affect the operation of the
MPLAB C30 compiler.
Work around
The application should save the DCOUNT Special
Function Register (SFR) prior to entering the inner
DO loop and restore it upon exiting the inner DO
loop. This work around is shown in Example 4.
Affected Silicon Revisions
A1
X
.include “p30fxxxx.inc”
.......
DO
....
PUSH DCOUNT
DO
....
BTSS Flag, #0
BSET CORCON, #EDT
....
....
POP
...
For details on the functionality of
EDT bit, see section 2.9.2.4
in the dsPIC30F Family Reference
Manual.
A2
X
#CNT1, LOOP0
#CNT2, LOOP1
W1, W5
DCOUNT
W5, W8
A3
X
SAVE AND RESTORE
DCOUNT
A4
X
;Outer loop start
;Save DCOUNT
;Inner loop
;starts
;Terminate inner
;DO-loop early
;Inner loop ends
;Restore DCOUNT
;Outer loop ends
6. Module: PLL
When the 4x PLL mode of operation is selected, the
specified input frequency range of 4 MHz-10 MHz is
not fully supported.
When device V
frequency must be in the range of 4 MHz-5 MHz.
When device V
frequency must be in the range of 4 MHz-6 MHz
for both industrial and extended temperature
ranges.
Work around
1. Use 8x PLL or 16x PLL mode of operation and
2. Use the EC without PLL Clock mode with a
Affected Silicon Revisions
A1
X
set final device clock speed using the
POST<1:0> oscillator postscaler control bits
(OSCCON<7:6>).
suitable clock frequency to obtain the equivalent
4x PLL clock rate.
A2
X
A3
X
DD
DD
is 2.5V-3.0V, the 4x PLL input
is 3.0V-3.6V, the 4x PLL input
© 2010 Microchip Technology Inc.
A4
X