EP9307-IR Cirrus Logic Inc, EP9307-IR Datasheet - Page 13

• Manufacturer Part Number: EP9307-IR
• Description: IC Universal Platform ARM9 SOC Prcessor
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9307-IR

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 14
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 272-TFBGA
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9307A-Z
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With: 598-1133 - KIT DEVELOPMENT EP9307 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: No
• Other names: 598-1255

ER667E2B
Workaround
A complete software workaround requires ensuring that data aborts do not occur due to any instruction
immediately preceding a coprocessor instruction that writes to an accumulator. The only way to ensure this
is to not allow memory operations immediately preceding these types of instructions. For example, the fixes
for the instructions above are:
Description 9
The coprocessor will erroneously update an accumulator if the coprocessor instruction that updates an
accumulator is canceled and is followed by a coprocessor instruction that is not a data path instruction. This
error will occur under the following conditions:
1) The first instruction:
2) The second instruction is not a coprocessor data path instruction. Coprocessor data path instructions
For example:
If the first instruction should not execute or is interrupted, it may incorrectly update a2.
Workaround
Because any instruction may be canceled due to an asynchronous interrupt, the most general software
workaround is to insure that no instruction that updates an accumulator is followed immediately by a non-
data path coprocessor instruction. For example, the fix for the instruction sequence above is:
Description 10
An instruction that writes a result to an accumulator
when the coprocessor is operating in serialized mode
For example, the following sequence of instructions may corrupt a2 if the second instruction is not executed.
Workaround
The only workaround for this issue is to operate the coprocessor in unserialized mode.
str
nop
cfmadda32
cfmva64ne
cfmvr64l
cfmva64ne
nop
cfmvr64l
cfmadda32
cfmadda32ne
include any instruction that does not move data to or from memory or to or from the ARM registers.
- must update a coprocessor accumulator
- does not execute
a0, a2, c0, c1
a2, c3, c0, c1
1
r7, [r0, #0x1d]
a0, a2, c0, c1
a2, c3
r4, c15
a2, c3
r4, c15
.
3
.
3
; assume this causes a data abort
may cause corruption of any of the four accumulators
2
.
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