LM2585S-ADJ National Semiconductor, LM2585S-ADJ Datasheet - Page 21

• Manufacturer Part Number: LM2585S-ADJ
• Description: DC/DC Converter IC
• Manufacturer: National Semiconductor

Specifications of LM2585S-ADJ

• Input Voltage: 40V
• Output Voltage: 37V
• No. Of Pins: 5
• Termination Type: SMD
• Mounting Type: Through Hole
• Output Current Max: 0.5A
• Peak Reflow Compatible (260 C): No
• Supply Voltage Max: 40V
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Application Hints
FLYBACK REGULATOR INPUT CAPACITORS
A flyback regulator draws discontinuous pulses of current
from the input supply. Therefore, there are two input capaci-
tors needed in a flyback regulator; one for energy storage
and one for filtering (see Figure 39 ). Both are required due to
the inherent operation of a flyback regulator. To keep a
stable or constant voltage supply to the LM2585, a storage
capacitor ( 100 µF) is required. If the input source is a recti-
fied DC supply and/or the application has a wide tempera-
ture range, the required rms current rating of the capacitor
might be very large. This means a larger value of capaci-
tance or a higher voltage rating will be needed of the input
capacitor. The storage capacitor will also attenuate noise
which may interfere with other circuits connected to the
same input supply voltage.
In addition, a small bypass capacitor is required due to the
noise generated by the input current pulses. To eliminate the
noise, insert a 1.0 µF ceramic capacitor between V
ground as close as possible to the device.
SWITCH VOLTAGE LIMITS
In a flyback regulator, the maximum steady-state voltage ap-
pearing at the switch, when it is off, is set by the transformer
turns ratio, N, the output voltage, V
put voltage, V
where V
and is 0.5V for Schottky diodes and 0.8V for ultra-fast recov-
ery diodes (typically). In certain circuits, there exists a volt-
age spike, V
age (see Figure 5 , waveform A). Usually, this voltage spike is
caused by the transformer leakage inductance and/or the
output rectifier recovery time. To “clamp” the voltage at the
switch from exceeding its maximum value, a transient sup-
pressor in series with a diode is inserted across the trans-
former primary (as shown in the circuit on the front page and
other flyback regulator circuits throughout the datasheet).
The schematic in Figure 39 shows another method of clamp-
ing the switch voltage. A single voltage transient suppressor
(the SA51A) is inserted at the switch pin. This method
clamps the total voltage across the switch, not just the volt-
age across the primary.
If poor circuit layout techniques are used (see the “Circuit
Layout Guideline” section), negative voltage transients may
appear on the Switch pin (pin 4). Applying a negative voltage
(with respect to the IC’s ground) to any monolithic IC pin
causes erratic and unpredictable operation of that IC. This
holds true for the LM2585 IC as well. When used in a flyback
regulator, the voltage at the Switch pin (pin 4) can go nega-
tive when the switch turns on. The “ringing” voltage at the
switch pin is caused by the output diode capacitance and the
transformer leakage inductance forming a resonant circuit at
the secondary(ies). The resonant circuit generates the “ring-
ing” voltage, which gets reflected back through the trans-
former to the switch pin. There are two common methods to
avoid this problem. One is to add an RC snubber around the
output rectifier(s), as in Figure 39 . The values of the resistor
and the capacitor must be chosen so that the voltage at the
Switch pin does not drop below −0.4V. The resistor may
range in value between 10 and 1 k , and the capacitor will
vary from 0.001 µF to 0.1 µF. Adding a snubber will (slightly)
reduce the efficiency of the overall circuit.
The other method to reduce or eliminate the “ringing” is to in-
sert a Schottky diode clamp between pins 4 and 3 (ground),
F
is the forward biased voltage of the output diode,
V
LL
SW(OFF)
IN
, superimposed on top of the steady-state volt-
(Max):
= V
IN
(Max) + (V
(Continued)
OUT
OUT
, and the maximum in-
+V
F
)/N
IN
and
21
also shown in Figure 39 . This prevents the voltage at pin 4
from dropping below −0.4V. The reverse voltage rating of the
diode must be greater than the switch off voltage.
OUTPUT VOLTAGE LIMITATIONS
The maximum output voltage of a boost regulator is the
maximum switch voltage minus a diode drop. In a flyback
regulator, the maximum output voltage is determined by the
turns ratio, N, and the duty cycle, D, by the equation:
The duty cycle of a flyback regulator is determined by the fol-
lowing equation:
Theoretically, the maximum output voltage can be as large
as desired — just keep increasing the turns ratio of the trans-
former. However, there exists some physical limitations that
prevent the turns ratio, and thus the output voltage, from in-
creasing to infinity. The physical limitations are capacitances
and inductances in the LM2585 switch, the output diode(s),
and the transformer — such as reverse recovery time of the
output diode (mentioned above).
NOISY INPUT LINE CONDITION
A small, low-pass RC filter should be used at the input pin of
the LM2585 if the input voltage has an unusual large amount
of transient noise, such as with an input switch that bounces.
The circuit in Figure 40 demonstrates the layout of the filter,
with the capacitor placed from the input pin to ground and
the resistor placed between the input supply and the input
pin. Note that the values of R
matic are good enough for most applications, but some read-
justing might be required for a particular application. If effi-
ciency is a major concern, replace the resistor with a small
inductor (say 10 µH and rated at 100 mA).
STABILITY
All current-mode controlled regulators can suffer from an in-
stability, known as subharmonic oscillation, if they operate
with a duty cycle above 50%. To eliminate subharmonic os-
cillations, a minimum value of inductance is required to en-
sure stability for all boost and flyback regulators. The mini-
mum inductance is given by:
where V
found in the Characteristic Curves.
SAT
is the switch saturation voltage and can be
FIGURE 40. Input Line Filter
V
OUT
N x V
IN
IN
and C
x D/(1 − D)
IN
shown in the sche-
DS012515-57
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