CS1301

Manufacturer Part NumberCS1301
DescriptionNational Semiconductor [Media Coprocessor]
ManufacturerNational Semiconductor
CS1301 datasheet
 


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Geode™ CS1301/CS1311 Multimedia Companion:
Media Coprocessor
General Description
®
The National Semiconductor
Geode™ CS1301 and
CS1311 multimedia companions act as coprocessors to
decode multimedia in National’s Geode single chip proces-
sor-based systems (i.e., SC1200/SC1201, SC2200, and
SC3200, hereafter referred to as SCx200). They provide a
multimedia experience for an Information Appliance (IA)
user that cannot typically be achieved on a PC.
By implementing a dedicated coprocessor to perform multi-
media tasks, a high quality video viewing experience can
be achieved. This high quality is achieved by having a
coprocessor architecture that is ideally suited for decoding
digital media. In addition, since the decoding is not occur-
ring on the SCx200, system events cannot interrupt the
Internal Block Diagram
CCIR-656 Digital Video
YUV 4:2:2 up to 81 MHz
(40 Mpix/sec)
Stereo Digital Audio
2
8/16-bit data I
S DC,
up to 22 MHz AI_SCK
Huffman Decoder
Slice-At-A-Time
MPEG-1 & 2
National Semiconductor and Virtual System Architecture are registered trademarks of National Semiconductor Corporation.
Geode, MacPHYTER, WebPAD, and VSA are trademarks of National Semiconductor Corporation.
For a complete listing of National Semiconductor trademarks, please visit www.national.com/trademarks.
© 2002 National Semiconductor Corporation
coprocessor’s task of decoding media and thereby causing
stuttering of sound or interruptions in the video.
Lower power consumption can also be achieved using the
SCx200/CS1301
CS1301/CS1311 has an architecture specifically designed
for decoding media. The architecture is such that while
decoding media, power is not consumed by portions of the
system that are not used to decode media. Since the
SCx200 is not decoding the media locally, it is able to go
into a lower power state. When the CS1301/CS1311 is not
decoding media, it uses almost no power.
Additionally, since the architecture is designed for decoding
media, fewer CS1301/CS1311 cycles are required.
SDRAM
Main Memory Interface
Video In
Video Out
Audio In
Audio Out
VLD
S/PDIF Out
Coprocessor
ACCESS.bus
Timers
Interface
32K I$
VLIW
Image
CPU
Coprocessor
16K D$
PCI Interface
1
Preliminary
August 2002
Revision 2.2
or
SCx200/CS1311
solution.
The
32-Bit Data
(up to 664 MB/sec)
CCIR-656 Digital Video
2/4/6/8 Ch. Digital Audio
2
16/32-Bit Data I
S DC,
up to 22 MHz AO_SCK
IEC958 up to 40 Mbit/sec
ACCESS.bus Interface
to EEPROM
Down and Up Scaling
YUV --> RGB
(50 Mpix/sec)
External Bus
PCI V2.1 (32 bits, 33 MHz)
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CS1301 Summary of contents