MCP1725T-1202E/MC Microchip Technology, MCP1725T-1202E/MC Datasheet - Page 21

• Manufacturer Part Number: MCP1725T-1202E/MC
• Description: 500mA CMOS LDO, Vout=1.2V, Extended Temp Range 8 DFN 2X3mm T/R
• Manufacturer: Microchip Technology

Specifications of MCP1725T-1202E/MC

• Regulator Topology: Positive Fixed
• Voltage - Output: 1.2V
• Voltage - Input: 2.3 ~ 6 V
• Voltage - Dropout (typical): 0.21V @ 500mA
• Number Of Regulators: 1
• Current - Output: 500mA (Min)
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-DFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Limit (min): -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

The maximum power dissipation capability for a
package can be calculated given the junction-to-
ambient thermal resistance and the maximum ambient
temperature for the application.
used to determine the package maximum internal
power dissipation.
EQUATION 5-4:
EQUATION 5-5:
EQUATION 5-6:
© 2007 Microchip Technology Inc.
P
P
T
T
T
T
D(MAX)
D(MAX)
A(MAX)
J(RISE)
J(RISE)
J(MAX)
Rθ
Rθ
T
T
JA
JA
A
J
P
D MAX
= Maximum device power dissipation
= maximum continuous junction
= maximum ambient temperature
= Thermal resistance from junction to
= Rise in device junction temperature
= Maximum device power dissipation
= Thermal resistance from junction to
= Junction temperature
= Rise in device junction temperature
= Ambient temperature
T
(
J RISE
(
over the ambient temperature
ambient
over the ambient temperature
temperature
ambient
T
)
J
=
)
=
=
(
---------------------------------------------------
T
T
P
J RISE
J MAX
(
(
D MAX
(
Rθ
)
)
+
–
)
Equation 5-4
JA
×
T
T
A
A MAX
Rθ
(
JA
)
)
can be
5.3
Internal power dissipation, junction temperature rise,
junction temperature and maximum power dissipation
is calculated in the following example. The power dissi-
pation as a result of ground current is small enough to
be neglected.
EXAMPLE 5-1:
5.3.1
The internal junction temperature rise is a function of
internal power dissipation and the thermal resistance
from junction-to-ambient for the application. The
thermal resistance from junction-to-ambient (Rθ
derived from an EIA/JEDEC standard for measuring
thermal resistance for small surface-mount packages.
The EIA/JEDEC specification is JESD51-7 “High
Effective Thermal Conductivity Test Board for Leaded
Surface-Mount Packages”. The standard describes the
test method and board specifications for measuring the
thermal resistance from junction to ambient. The actual
thermal resistance for a particular application can vary
depending on many factors such as copper area and
thickness. Refer to AN792, “A Method to Determine
How Much Power a SOT23 Can Dissipate in an Appli-
cation” (DS00792), for more information regarding this
subject.
Package
Input Voltage
LDO Output Voltage and Current
Maximum Ambient Temperature
Internal Power Dissipation
P
Package
LDO(MAX)
T
A(MAX)
T
V
P
P
Type
I
T
T
J(RISE)
Typical Application
OUT
OUT
LDO
LDO
V
JRISE
JRISE
IN
DEVICE JUNCTION TEMPERATURE
RISE
=
=
=
=
=
=
=
=
=
=
=
2x3 DFN
3.3V ± 5%
2.5V
0.5A
60°C
(V
I
((3.3V x 1.05) – (2.5V x 0.975))
x 0.5A
0.51 Watts
OUT(MAX)
P
0.51 W x 76.0
38.8
POWER DISSIPATION
EXAMPLE
IN(MAX)
TOTAL
°
C
MCP1725
x Rθ
– V
OUT(MIN)
JA
°
DS22026B-page 21
C/W
) x
JA
) is