PIC12F510T-I/SN Microchip Technology, PIC12F510T-I/SN Datasheet
PIC12F510T-I/SN
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PIC12F510T-I/SN Summary of contents
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... Flash Microcontrollers © 2007 Microchip Technology Inc. PIC12F510/16F506 Data Sheet DS41268D ...
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... PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
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... Multiplexed MCLR Input Pin • Selectable Internal Weak Pull-Ups on I/O Pins • Power-Saving Sleep mode • Wake-up from Sleep on Pin Change • Wake-up from Sleep on Comparator Change © 2007 Microchip Technology Inc. PIC12F510/16F506 • Selectable Oscillator Options: - INTOSC: 4/8 MHz precision Internal oscillator ...
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... GP3/MCLR/V DS41268D-page 2 Data Memory SRAM (bytes) 1024 67 1024 RB0/AN0/C1IN+/ICSPDAT 2 13 RB1/AN1/C1IN-/ICSPCLK 3 12 RB2/AN2/C1OUT RC0/C2IN+ 10 RC1/C2IN RC2/CV RC3 GP0/AN0/C1IN+/ICSPDAT 2 7 GP1/AN1/C1IN-/ICSPCLK 3 6 GP2/AN2/T0CKI/C1OUT GP0/AN0/C1IN+/ICSPDAT 3 6 GP1/AN1/C1IN-/ICSPCLK GP2/AN2/T0CKI/C1OUTI Timers I/O 8-bit REF © 2007 Microchip Technology Inc. ...
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... When contacting a sales office, please specify which device, revision of silicon and data sheet (include literature number) you are using. Customer Notification System Register on our web site at www.microchip.com to receive the most current information on all of our products. © 2007 Microchip Technology Inc. PIC12F510/16F506 DS41268D-page 3 ...
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... PIC12F510/16F506 NOTES: DS41268D-page 4 © 2007 Microchip Technology Inc. ...
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... The PIC12F510/16F506 devices have Power-on Reset, selectable Watchdog Timer, selectable code-protect, high I/O current capability and precision internal oscillator. The PIC12F510/16F506 devices use serial programming with data pin RB0/GP0 and clock pin RB1/GP1. © 2007 Microchip Technology Inc. PIC12F510/16F506 1.1 Applications ...
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... PIC12F510/16F506 NOTES: DS41268D.-page 6 © 2007 Microchip Technology Inc. ...
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... Flash devices, but with all Flash locations and fuse options already programmed by the factory. Certain code and prototype verification procedures do apply before production shipments are available. Please contact your local Microchip Technology sales office for more details. © 2007 Microchip Technology Inc. PIC12F510/16F506 2 ...
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... PIC12F510/16F506 NOTES: DS41268D-page 8 © 2007 Microchip Technology Inc. ...
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... The ALU is a general purpose arithmetic unit. It performs arithmetic and Boolean functions between data in the working register and any register file. © 2007 Microchip Technology Inc. PIC12F510/16F506 The ALU is 8 bits wide and capable of addition, subtrac- tion, shift and logical operations. Unless otherwise mentioned, arithmetic operations are two’ ...
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... Addr FSR Reg STATUS Reg 3 MUX Device Reset Timer Power-on ALU Reset 8 Watchdog Timer W Reg Internal RC Clock Timer0 T0CKI GPIO GP0/ICSPDAT GP1/ICSPCLK GP2 GP3 GP4 GP5 C1IN+ Comparator C1IN- C1OUT CV REF AN0 8-bit ADC AN1 AN2 © 2007 Microchip Technology Inc. ...
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... Legend input output, I/O = input/output power, — = Not Used, TTL = TTL input Schmitt Trigger input Analog Voltage High Voltage © 2007 Microchip Technology Inc. PIC12F510/16F506 Output Input Type Type TTL CMOS Bidirectional I/O port. Can be software pro- grammed for internal weak pull-up and wake-up from Sleep on pin change ...
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... Clock Timer0 T0CKI PORTB RB0/ICSPDAT RB1/ICSPCLK RB2 RB3 RB4 RB5 PORTC RC0 RC1 RC2 RC3 RC4 RC5 C1IN+ Comparator 1 C1IN- C1OUT 0.6V Reference C2IN+ C2IN- Comparator 2 C2OUT CV REF CV CV REF REF AN0 8-bit ADC AN1 AN2 © 2007 Microchip Technology Inc. ...
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... Legend input output, I/O = input/output power, — = Not Used, TTL = TTL input Schmitt Trigger input Analog Voltage High Voltage © 2007 Microchip Technology Inc. PIC12F510/16F506 Output Input Type Type TTL CMOS Bidirectional I/O port. Can be software pro- grammed for internal weak pull-up and wake-up from Sleep on pin change ...
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... Q2, Q3 and Q4 cycles. Data memory is read during Q2 (operand read) and written during Q4 (destination write Fetch INST ( Execute INST (PC) Execute 1 Fetch 2 Execute 2 Fetch 3 Execute 3 Fetch Internal Phase Clock Fetch INST ( Execute INST ( Flush Fetch SUB_1 Execute SUB_1 © 2007 Microchip Technology Inc. ...
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... The effective Reset vector is a 0000h (see Figure 4-1). Location 03FFh contains the internal clock oscillator calibration value. This value should never be overwritten. © 2007 Microchip Technology Inc. PIC12F510/16F506 FIGURE 4-1: PROGRAM MEMORY MAP AND STACK FOR THE PIC12F510/16F506 PC< ...
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... INDF TMR0 PCL Addresses map back to STATUS addresses in FSR Bank 0. OSCCAL GPIO CM1CON0 ADCON0 ADRES General Purpose Registers 2Fh 30h General General Purpose Purpose Registers Registers 3Fh Bank 0 Bank 1 11 General Purpose Registers Bank 3 © 2007 Microchip Technology Inc. ...
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... Shaded cells = unimplemented or unused. Note 1: The upper byte of the Program Counter is not directly accessible. See Section 4.6 “Program Counter” for an explanation of how to access these bits. © 2007 Microchip Technology Inc. PIC12F510/16F506 Bit 5 Bit 4 Bit 3 ...
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... DC C 0001 1xxx 100x xxxx CAL0 — 1111 111- RB1 RB0 --xx xxxx RC1 RC0 --xx xxxx C1PREF C1WU 1111 1111 GO/DONE ADON 1111 1100 xxxx xxxx C2PREF1 C2WU 1111 1111 VR1 VR0 0011 1111 © 2007 Microchip Technology Inc. ...
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... A borrow from the 4th low-order bit of the result did not occur borrow from the 4th low-order bit of the result occurred bit 0 C: Carry/Borrow bit (for ADDWF, SUBWF and RRF, RLF instructions) ADDWF carry occurred carry did not occur © 2007 Microchip Technology Inc. PIC12F510/16F506 R-1 R-1 R/W Unimplemented bit, read as ‘ ...
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... A carry did not occur DS41268D-page 20 R-1 R-1 R/W Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared RRF or RLF: SUBWF borrow did not occur Load bit with LSb or MSb, respectively borrow occurred R/W-x R/W bit Bit is unknown © 2007 Microchip Technology Inc. ...
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... PS<2:0>: Prescaler Rate Select bits Bit Value Timer0 Rate 000 001 010 011 100 101 110 111 © 2007 Microchip Technology Inc. PIC12F510/16F506 functions are W-1 W-1 T0SE PSA U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared WDT Rate ...
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... DS41268D-page 22 W-1 W-1 T0SE PSA U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared WDT Rate 128 256 1 : 128 W-1 W-1 W-1 PS2 PS1 PS0 bit Bit is unknown © 2007 Microchip Technology Inc. ...
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... Center frequency 1111111 • • • 1000000 = Minimum frequency bit 0 Unimplemented: Read as ‘0’ © 2007 Microchip Technology Inc. PIC12F510/16F506 R/W-1 R/W-1 R/W-1 CAL3 CAL2 CAL1 U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared R/W-1 U-0 CAL0 — ...
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... There are no Status bits to indicate stack overflows or stack underflow conditions. 3: There are no instruction mnemonics called PUSH or POP. These are actions that occur from the execution of the CALL and RETLW instructions. 0 GOTO instruction will © 2007 Microchip Technology Inc. ...
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... Data 0Fh (1) Memory 10h 1Fh Bank 0 Note 1: For register map detail, see Figure 4-2. 2: Grey boxes are unimplemented and read as ‘1’. © 2007 Microchip Technology Inc. PIC12F510/16F506 EXAMPLE 4-1: MOVLW MOVWF NEXT CLRF INCF BTFSC GOTO CONTINUE The FSR is a 5-bit wide register used in conjunc- tion with the INDF register to indirectly address the data memory area ...
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... Bank Select Location Select 00h Data 0Fh (1) Memory 10h Note 1: For register map detail, see Figure 4-3. DS41268D-page Addresses map back to addresses in Bank 0. 1Fh 3Fh 5Fh 7Fh Bank 0 Bank 1 Bank 2 Bank 3 Indirect Addressing (FSR Bank Location Select © 2007 Microchip Technology Inc. ...
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... Note: The TRIS registers are write-only and are set (output drivers disabled) upon Reset. © 2007 Microchip Technology Inc. PIC12F510/16F506 5.4 I/O Interfacing The equivalent circuit for an I/O port pin is shown in Figure 5-1. All port pins, except RB3/GP3 which is input only, may be used for both input and output oper- ations ...
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... SS DS41268D-page 28 FIGURE 5-3: GPPU RBPU MCLRE (1) I/O Pin Reset Data Bus RD Port Q CK Mismatch and DD Note 1: GP3/MCLR pin has a protection diode to V only. BLOCK DIAGRAM OF GP3/RB3 (With Weak Pull-up And Wake-up On Change) (1) I/O Pin D SS © 2007 Microchip Technology Inc. ...
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... D Q TRIS Latch TRIS ‘f’ Reset T0CS C1T0CS ADC Pin Enable RD Port T0CKI ADC Note 1: I/O pins have protection diodes © 2007 Microchip Technology Inc. PIC12F510/16F506 FIGURE 5-5: C1OUT (1) I/O Pin Data Bus D Data WR Latch Port CK C1OUTEN W Reg D TRIS Latch TRIS ‘ ...
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... Bus D WR Port CK W I/O Reg (1) pin D TRIS ‘f’ CK (Note 2) Note 1: I/O pins have protection diodes to V and BLOCK DIAGRAM OF GP4 Q Data I/O Latch (1) pin Q Q TRIS Latch Q Reset INTOSC/RC RD Port Oscillator OSC1 Circuit and DD . © 2007 Microchip Technology Inc. ...
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... Latch TRIS ‘f’ Reset RD Port Oscillator OSC2 Circuit Note 1: I/O pins have protection diodes Input mode is disabled when pin is used for oscillator. © 2007 Microchip Technology Inc. PIC12F510/16F506 FIGURE 5-9: Data Bus D I/O (1) pin WR Port CK W Reg D TRIS ‘f’ CK ...
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... I/O pins have protection diodes DS41268D-page 32 FIGURE 5-11: Data Bus D Data WR Latch 1 (1) I/O PIN Port Reg D TRIS Latch TRIS ‘f’ CK Reset and Note 1: I/O pins have protection diodes BLOCK DIAGRAM OF RC3 (1) I/O Pin Port and DD © 2007 Microchip Technology Inc. ...
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... Port Q CK C2OUTEN W Reg D Q TRIS Latch TRIS ‘f’ Reset RD Port Note 1: I/O pins have protection diodes © 2007 Microchip Technology Inc. PIC12F510/16F506 FIGURE 5-13: (1) I/O Pin Data Bus D Data WR Latch Port CK W Reg D TRIS Latch TRIS ‘f’ CK Reset ...
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... GP0 --xx xxxx --uu uuuu RB0 --xx xxxx --uu uuuu RC0 --xx xxxx --uu uuuu RB4 RB5 OSC1/CLKIN TRISB TRISB — — RC4 RC5 C2OUT T0CKI TRISC TRISC GP4 GP5 OSC2 OSC1/CLKIN TRISIO TRISIO — — — — © 2007 Microchip Technology Inc. ...
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... Note 1: Multiple column entries for a pin demonstrate the different permutations to arrive at digital functionality for the pin. 2: Shaded cells indicate the bit status does not affect the pins digital functionality. © 2007 Microchip Technology Inc. PIC12F510/16F506 GP1 GP1 GP2 GP2 0 ...
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... Disabled Disabled — — Disabled Disabled (1), (2) RC4 RC4 RC5 RC5 — — — — — — — — — — — — — — — — — 1 — — — — — — — 0 © 2007 Microchip Technology Inc. ...
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... Instruction Fetched MOVWF PORTB MOVF PORTB, W RB<5:0> Port pin written here Instruction Executed MOVWF PORTB (Write to PORTB) © 2007 Microchip Technology Inc. PIC12F510/16F506 EXAMPLE 5-1: ;Initial PORTB Settings ;PORTB<5:3> Inputs ;PORTB<2:0> Outputs ; ; ; BCF PORTB, 5 ;--01 -ppp BCF PORTB, 4 ;--10 -ppp MOVLW 007h ...
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... PIC12F510/16F506 NOTES: DS41268D-page 38 © 2007 Microchip Technology Inc. ...
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... The prescaler is shared with the Watchdog Timer (Figure 6-5). 3: Bit C1T0CS is located in the CM1CON0 register, CM1CON0<4>. © 2007 Microchip Technology Inc. PIC12F510/16F506 The second Counter mode uses the output of the com- parator to increment Timer0. It can be entered in two different ways. The first way is selected by setting the T0CS bit (OPTION< ...
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... NT0 reads NT0 + 1 reads NT0 + 2 Value on Value on Bit 1 Bit 0 Power-On All Other Reset Resets xxxx xxxx uuuu uuuu C1WU 1111 1111 uuuu uuuu C1WU 1111 1111 uuuu uuuu PS1 PS0 1111 1111 1111 1111 ---- 1111 --11 1111 © 2007 Microchip Technology Inc. ...
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... Timer0 module means that there is no prescaler for the WDT and vice-versa. The PSA and PS<2:0> bits (OPTION<3:0>) determine prescaler assignment and prescale ratio. © 2007 Microchip Technology Inc. PIC12F510/16F506 When a prescaler is used, the external clock input is divided by the asynchronous ripple counter-type prescaler, so that the prescaler output is symmetrical ...
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... T0CS (1) PSA 0 8-bit Prescaler 8-to-1 MUX (1) PSA 1 0 MUX PSA WDT Time-Out CHANGING PRESCALER (WDT→TIMER0) ;Clear WDT and ;prescaler ;Select TMR0, new ;prescale value and ;clock source Data Bus 8 Sync TMR0 Reg 2 Cycles (1) PS<2:0> (1) © 2007 Microchip Technology Inc. ...
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... C1WU: Comparator Wake-up On Change Enable bit 1 = Wake-up On Comparator Change is disabled 0 = Wake-up On Comparator Change is enabled Note 1: Overrides T0CS bit for TRIS control of RB2. 2: When comparator is turned on, these control bits assert themselves. © 2007 Microchip Technology Inc. PIC12F510/16F506 R/W-1 R/W-1 R/W-1 C1T0CS C1ON C1NREF U = Unimplemented bit, read as ‘ ...
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... When comparator is turned on, these control bits assert themselves. Otherwise, the other registers have precedence. DS41268D-page 44 R/W-1 R/W-1 R/W-1 C1T0CS C1ON C1NREF U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared (1), (2) (2) (2) (2) (2) (2) R/W-1 R/W-1 C1PREF C1WU bit Bit is unknown © 2007 Microchip Technology Inc. ...
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... Wake-up on Comparator change is disabled 0 = Wake-up on Comparator change is enabled. Note 1: Overrides TOCS bit for TRIS control of RC4. 2: When comparator is turned on, these control bits assert themselves. Otherwise, the other registers have precedence. © 2007 Microchip Technology Inc. PIC12F510/16F506 R/W-1 R/W-1 R/W-1 C2PREF2 C2ON C2NREF U = Unimplemented bit, read as ‘ ...
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... When C2ON = 0, the comparator, C2, will produce a ‘0’ output to the XOR Gate. DS41268D-page RD_CM1CON0 EN CL NRESET (1) C1ON + C1OUT C1 - C1POL RD_CM2CON0 EN (1) C2ON CL NRESET + C2OUT C2 - C2POL To Data Bus RD_CM1CON0 C1WUF C1WU C1OUTEN C1OUT To Data Bus RD_CM2CON0 C2WUF Q C2WU C2OUTEN C2OUT © 2007 Microchip Technology Inc. ...
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... The comparator output is read through the CM1CON0 or CM2CON0 register. This bit is read-only. The comparator output may also be used externally, see Figure 7-3. © 2007 Microchip Technology Inc. PIC12F510/16F506 Note: Analog levels on any pin that is defined as a digital input may cause the input buffer to consume more current than is specified ...
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... Value on Bit 1 Bit 0 All Other POR Resets DC C 0001 1xxx qq0q quuu C1PREF C1WU 1111 1111 uuuu uuuu C1PREF C1WU 1111 1111 uuuu uuuu C2PREF1 C2WU 1111 1111 uuuu uuuu --11 1111 --11 1111 --11 1111 --11 1111 --11 1111 --11 1111 © 2007 Microchip Technology Inc. ...
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... REF 2: CV controls for ratio metric reference applies to Comparator 2 on the PIC16F506 only. REF © 2007 Microchip Technology Inc. PIC12F510/16F506 8.2 Voltage Reference Accuracy/Error The full range of V construction of the module. The transistors on the top and bottom of the resistor ladder network (Figure 8-1) ...
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... C1POL C1T0CS C1ON C1NREF C1PREF C2POL C2PREF2 C2ON C2NREF C2PREF1 R 8R VRR Value on Value on all Bit 1 Bit 0 POR other Resets VR1 VR0 001- 1111 001- 1111 C1WU 1111 1111 uuuu uuuu C2WU 1111 1111 uuuu uuuu © 2007 Microchip Technology Inc. ...
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... Microchip Technology Inc. PIC12F510/16F506 When the CHS<1:0> bits are changed during an ADC conversion, the new channel will not be selected until the current conversion is completed. This allows the current conversion to complete with valid results. All channel selection information will be lost when the device enters Sleep ...
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... Table 9-2 than from use of the INTOSC/4 option for the OSC ADCS1 ADCS0 CHS1 350 200 100 32 kHz kHz kHz kHz — — — — 11 μs 20 μs 40 μs 125 μs 23 μs 40 μs 80 μs 250 μs 46 μs 80 μs 160 μs 500 μs CHS0 GO/DONE ADON © 2007 Microchip Technology Inc. ...
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... CHS<1:0> bits default to 11 after any Reset the ADON bit is clear, the GO/DONE bit cannot be set. © 2007 Microchip Technology Inc. PIC12F510/16F506 shifts of the ‘leading one’ have taken place, the conver- sion is complete; the ‘leading one’ has been shifted out and the GO/DONE bit is cleared ...
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... Bit is unknown CHANNEL SELECTION CHANGE DURING CONVERSION ;configure A/D ;start conversion ;setup for read of ;channel 1 ;read result ;save result ;start conversion ;setup for read of ;channel 2 ;read result ;save result ;start conversion ;read result ;save result ;optional: returns © 2007 Microchip Technology Inc. ...
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... MHz oscillator. The EXTRC oscillator option saves system cost while the LP crystal option saves power. A set of Configuration bits are used to select various options. © 2007 Microchip Technology Inc. PIC12F510/16F506 10.1 Configuration Bits The PIC12F510/16F506 Configuration Words consist of 12 bits ...
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... It is the responsibility of the application designer to ensure the use of the 1.125 ms (nominal) DRT will result in acceptable operation. Refer to Electrical Specifications for V ments for this mode of operation. DS41268D-page 56 — — — MCLRE CP WDTE DD (2) (2) rise time and stability require- DD (1) — — bit 8 FOSC1 FOSC0 bit 0 © 2007 Microchip Technology Inc. ...
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... Refer to the “PIC16F506 Memory Programming Specification” (DS41258) to determine how to access the Configuration Word the responsibility of the application designer to ensure the use of the 1.125 ms (nominal) DRT will result in acceptable operation. Refer to Electrical Specifications for V ments for this mode of operation. © 2007 Microchip Technology Inc. PIC12F510/16F506 — — — CP ...
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... OSC CONFIGURATION) PIC12F510 OSC1 PIC16F506 Sleep XTAL ( internal logic OSC2 (2) RS EXTERNAL CLOCK INPUT OPERATION (HS OSC CONFIGURATION) OSC1 PIC12F510 PIC16F506 Open OSC2 CAPACITOR SELECTION FOR CERAMIC RESONATORS – (1) PIC12F510/16F506 Cap. Range Cap. Range Freq 10-47 pF 10-47 pF © 2007 Microchip Technology Inc. ...
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... The 4.7 kΩ resistor provides the negative feedback for stability. The 10 kΩ potenti- ometers bias the 74AS04 in the linear region. This circuit could be used for external oscillator designs. © 2007 Microchip Technology Inc. PIC12F510/16F506 FIGURE 10-3: (2) +5V Cap ...
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... For the PIC12F510/16F506 devices, only bits <7:1> of OSCCAL are used for calibration. See Register 4-5 for more information. Note: The 0 bit of OSCCAL is unimplemented and should be written as ‘0’ when modify- Internal clock ing OSCCAL for compatibility with future devices. PIC12F510 PIC16F506 © 2007 Microchip Technology Inc. ...
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... Legend unchanged unknown, – = unimplemented bit, read as ‘0’ value depends on condition. Note 1: Bits <7:2> register contain oscillator calibration values due to MOVLW XX instruction at top of memory. 2: See Table 10-5 for Reset value for specific conditions. © 2007 Microchip Technology Inc. PIC12F510/16F506 MCLR Reset, WDT Time-out, Power-on Reset Wake-up On Pin Change, Wake-up on Comparator Change ...
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... PCL Addr: 02h 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 © 2007 Microchip Technology Inc. ...
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... If these conditions are not met, the devices must be held in Reset until the operating parameters are met. © 2007 Microchip Technology Inc. PIC12F510/16F506 A simplified block diagram of the on-chip Power-on Reset circuit is shown in Figure 10-7. The Power-on Reset circuit and the Device Reset Timer (see Section 10.5 “ ...
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... Internal Reset FIGURE 10-9: TIME-OUT SEQUENCE ON POWER-UP (MCLR TIED TO V TIME V DD MCLR Internal POR DRT Time-out Internal Reset DS41268D-page 64 POR (Power-on Reset) MCLR Reset Start-up Timer (10 ms, 1.125 ms) TDRT CHIP Reset TDRT ): FAST V RISE DD DD © 2007 Microchip Technology Inc. ...
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... V DD MCLR Internal POR DRT Time-out Internal Reset Note: When V rises slowly, the T DD value. In this example, the chip will reset properly if, and only if, V1 ≥ V © 2007 Microchip Technology Inc. PIC12F510/16F506 V1 TDRT time-out expires long before V DRT DD ): SLOW V RISE DD DD has reached its final min ...
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... WDT. This gives the maximum Sleep time before a WDT wake-up Reset. TYPICAL DRT PERIODS Subsequent POR Reset Resets μs 1.125 ms 10 μs 1.125 ms 10 μs 1.125 ms rise time and DD and part-to-part DD = Min., Temperature DD © 2007 Microchip Technology Inc. ...
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... N/A OPTION GPWU GPPU T0CS (2) N/A OPTION RBWU RBPU Legend: Shaded boxes = Not used by Watchdog Timer. – = unimplemented, read as ‘0’ unchanged. Note 1: PIC12F510 only. 2: PIC16F506 only. © 2007 Microchip Technology Inc. PIC12F510/16F506 0 M Postscaler Postscaler 8-to-1 MUX PSA To Timer0 0 1 MUX ...
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... This brown-out protection circuit employs Microchip Technology’s MCP809 microcon- troller supervisor. There are 7 different trip point selections to accommodate systems. goes DD BROWN-OUT PROTECTION CIRCUIT PIC12F510 PIC16F506 Q1 (2) MCLR (1) 40k is below a certain level such 0. BROWN-OUT PROTECTION CIRCUIT MCLR PIC12F510 PIC16F506 © 2007 Microchip Technology Inc. ...
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... If a wake-up on change occurs and the pins are not read before reentering Sleep, a wake-up will occur immediately even if no pins change while in Sleep mode. © 2007 Microchip Technology Inc. PIC12F510/16F506 Note 1: Caution: Right before entering Sleep, read register(s) CM1CON0 and CM2CON0. ...
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... Programming Specifications. A typical In-Circuit Serial Programming connection is shown in Figure 10-15. DS41268D-page 70 FIGURE 10-15: External Connector Signals + CLK (see program- Data I/O becomes the TYPICAL IN-CIRCUIT SERIAL PROGRAMMING CONNECTION To Normal Connections PIC12F510 PIC16F506 MCLR/V PP GP1/RB1 GP0/RB0 Normal Connections © 2007 Microchip Technology Inc. ...
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... Register bit field < > ∈ In the set of italics User defined term (font is courier) © 2007 Microchip Technology Inc. PIC12F510/16F506 All instructions are executed within a single instruction cycle, unless a conditional test is true or the program counter is changed as a result of an instruction. In this case, the execution takes two instruction cycles. One instruction cycle consists of four oscillator periods ...
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... 0000 0000 0100 2 None 101k kkkk kkkk 1 Z 1101 kkkk kkkk 1 None 1100 kkkk kkkk 1 None 0000 0000 0010 2 None 1000 kkkk kkkk 0000 0000 0011 1 None 0000 0000 0fff 1 Z 1111 kkkk kkkk © 2007 Microchip Technology Inc. Notes ...
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... The contents of the W register are AND’ed with register ‘f’. If ‘d’ is ‘0’, the result is stored in the W register. If ‘d’ is ‘1’, the result is stored back in register ‘f’. © 2007 Microchip Technology Inc. PIC12F510/16F506 BCF Bit Clear f Syntax: ...
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... Operands: d ∈ [0,1] (f) → (dest) Operation: Status Affected: Z Description: The contents of register ‘f’ are complemented. If ‘d’ is ‘0’, the result is stored in the W register. If ‘d’ is ‘1’, the result is stored back in register ‘f’. © 2007 Microchip Technology Inc. ...
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... Description: GOTO is an unconditional branch. The 9-bit immediate value is loaded into PC bits <8:0>. The upper bits of PC are loaded from STATUS <6:5>. GOTO is a two- cycle instruction. © 2007 Microchip Technology Inc. PIC12F510/16F506 INCF Increment f Syntax: [ label ] INCF f,d 0 ≤ f ≤ 31 Operands: d ∈ ...
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... NOP Operands: None Operation: No operation Status Affected: None Description: No operation. OPTION Load OPTION Register Syntax: [ label ] Option Operands: None Operation: (W) → Option Status Affected: None Description: The content of the W register is loaded into the OPTION register. © 2007 Microchip Technology Inc. f ...
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... Carry flag. If ‘d’ is ‘0’, the result is placed in the W register. If ‘d’ is ‘1’, the result is placed back in register ‘f’. register ‘f’ C © 2007 Microchip Technology Inc. PIC12F510/16F506 SLEEP Enter SLEEP Mode Syntax: [label ] SLEEP ...
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... Operation: Status Affected: Z Description: Exclusive OR the contents of the W register with register ‘f’. If ‘d’ is ‘0’, the result is stored in the W register. If ‘d’ is ‘1’, the result is stored back in register ‘f’. © 2007 Microchip Technology Inc. f,d ...
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... PICSTART Plus Development Programmer - MPLAB PM3 Device Programmer - PICkit™ 2 Development Programmer • Low-Cost Demonstration and Development Boards and Evaluation Kits © 2007 Microchip Technology Inc. PIC12F510/16F506 12.1 MPLAB Integrated Development Environment Software The MPLAB IDE software brings an ease of software development previously unseen in the 8/16-bit micro- controller market ...
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... MPLAB C30 C Compilers, and the MPASM and MPLAB ASM30 Assemblers. The software simulator offers the flexibility to develop and debug code outside of the hardware laboratory environment, making it an excellent, economical software development tool. ® DSCs on an instruction © 2007 Microchip Technology Inc. ...
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... Microchip Technology Inc. PIC12F510/16F506 12.9 MPLAB ICD 2 In-Circuit Debugger Microchip’s In-Circuit Debugger, MPLAB ICD ...
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... SEEVAL evaluation system, Sigma-Delta ADC, flow rate sensing, plus many more. Check the Microchip web page (www.microchip.com) and the latest “Product Selector Guide” (DS00148) for the complete list of demonstration, development and evaluation kits. © 2007 Microchip Technology Inc. ® ...
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... This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. © 2007 Microchip Technology Inc. PIC12F510/16F506 ............................................................................... -0. )...................................................................................................................± ...
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... VOLTAGE-FREQUENCY GRAPH, -40°C ≤ T FIGURE 13-1: 6.0 5.5 5.0 4 (Volts) 4.0 3.5 3.0 2.5 2 MAXIMUM OSCILLATOR FREQUENCY TABLE (PIC12F510) FIGURE 13- EXTRC INTOSC 0 DS41268D-page 84 ≤ +125°C (PIC12F510 Frequency (MHz) 200 kHz 4 MHz 8 MHz Frequency (MHz MHz © 2007 Microchip Technology Inc. ...
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... VOLTAGE FREQUENCY GRAPH, -40°C ≤ T FIGURE 13-3: 6.0 5.5 5.0 4 (Volts) 4.0 3.5 3.0 2.5 2 MAXIMUM OSCILLATOR FREQUENCY TABLE (PIC16F506) FIGURE 13- EXTRC INTOSC © 2007 Microchip Technology Inc. PIC12F510/16F506 ≤ +125°C (PIC16F506 Frequency (MHz) 200 kHz 4 MHz 8 MHz Frequency (MHz MHz DS41268D-page 85 ...
Page 88
... V = 2.0V (high range) DD μ 5.0V (high range) DD μ 2.0V (0.6V reference and DD 1 comparator enabled) μ 5.0V (0.6V reference and DD 1 comparator enabled) μA 2.0V μA 5.0V , T0CKI = V , MCLR = except that the device is in Sleep DD © 2007 Microchip Technology Inc. ; ...
Page 89
... If a module current is listed, the current is for that specific module enabled and the device in Sleep. 6: Does not include current through /2R (mA) with R DD EXT EXT © 2007 Microchip Technology Inc. PIC12F510/16F506 Standard Operating Conditions (unless otherwise specified) Operating Temperature 40°C ≤ T (1) Min Typ Max 2 ...
Page 90
... OH V – 0.7 — — -1.0 mA — — XT, HS and LP modes when external clock is used to drive OSC1. — — © 2007 Microchip Technology Inc. Conditions ≤ 5.5V DD ≤ 5.5V DD range PIN SS ≤ Pin at high-impedance PIN DD ≤ V PIN DD ≤ XT, HS and LP oscillator ...
Page 91
... Data in the “Typ” column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance only are not tested. Note 1: The A/D conversion result never decreases with an increase in the input voltage and has no missing codes. © 2007 Microchip Technology Inc. PIC12F510/16F506 Min Typ Max Units — ...
Page 92
... FIGURE 13-6: EXTERNAL CLOCK TIMING Q4 OSC1 DS41268D-page 90 T Time mc MCLR osc Oscillator os OSC1 t0 T0CKI wdt Watchdog Timer P Period R Rise V Valid Z High-impedance Legend for all pins except OSC2 for OSC2 in XT modes when external clock is used to drive OSC1 © 2007 Microchip Technology Inc. ...
Page 93
... Exceeding these specified limits may result in an unstable oscillator operation and/or higher than expected current consumption. When an external clock input is used, the “max” cycle time limit is “DC” (no clock) for all devices. © 2007 Microchip Technology Inc. PIC12F510/16F506 Standard Operating Conditions (unless otherwise specified) Operating Temperature -40° ...
Page 94
... MHz 20, 21 Conditions 25° 2.5V ≤ V ≤ 5.5V DD 0°C ≤ T ≤ +85°C A 2.0V ≤ V ≤ 5.5V DD -40°C ≤ T ≤ +85°C (Ind.) A -40°C ≤ T ≤ +125°C (Ext New Value © 2007 Microchip Technology Inc. ...
Page 95
... I/O pin Note 1: I/O pins must be taken out of High-Impedance mode by enabling the output drivers in software. 2: Runs in MCLR or WDT Reset only in XT, LP and HS modes. © 2007 Microchip Technology Inc. PIC12F510/16F506 -40°C ≤ T ≤ +85°C (industrial) A -40°C ≤ T ≤ +125°C (extended) ...
Page 96
... 5.0V (Industrial 5.0V (Extended ≤ +85°C (industrial) A -40°C ≤ T ≤ +125°C (extended) A (1) Max Units Conditions — — ns — — ns — — ns — — ns — — ns Whichever is greater Prescale Value (1, 2, 4,..., 256) © 2007 Microchip Technology Inc. ...
Page 97
... RB0 (GP0)/RB1 (GP1) 2.0 - 125 5.5 - 125 RB3 (GP3) 2.0 - 125 5.5 - 125 © 2007 Microchip Technology Inc. PIC12F510/16F506 Min Typ 73K 105K 73K 113K 82K 123K 86K 132k 15K 21K 15K 22K 19K 26k 23K 29K 63K 81K 77K ...
Page 98
... PIC12F510/16F506 NOTES: DS41268D-page 96 © 2007 Microchip Technology Inc. ...
Page 99
... V OVER 1,400 Typical: Statistical Mean @25°C 1,200 Maximum: Mean (Worst-Case Temp) + 3σ (-40°C to 125°C) 1,000 800 600 400 200 0 2.0 2.5 © 2007 Microchip Technology Inc. PIC12F510/16F506 OSC XT Mode 4 MHz 4 MHz 3.0 3.5 4.0 4 Maximum Typical 5.0 5.5 ...
Page 100
... Mode all Peripherals Disabled) 3.0 3.5 4.0 V (V) DD vs. V (SLEEP MODE, ALL PERIPHERALS DISABLED) DD Maximum (Sleep Mode all Peripherals Disabled) Max. 125°C Max. 85°C 3.0 3.5 4.0 V (V) DD 4.5 5.0 5.5 4.5 5.0 5.5 © 2007 Microchip Technology Inc. ...
Page 101
... FIGURE 14-5: TYPICAL WDT Typical: Statistical Mean @25°C Maximum: Mean (Worst-Case Temp) + 3σ 7 (-40°C to 125° 2.0 2.5 © 2007 Microchip Technology Inc. PIC12F510/16F506 vs. V (COMPARATOR ENABLED 3.0 3.5 4.0 V ( 3.0 3.5 4.0 V (V) DD Maximum Typical 4 ...
Page 102
... PD DD Maximum Max. 125°C Max. 85°C 3.0 3.5 4.0 V (V) DD OVER TEMPERATURE (NO PRESCALER) DD Typical: Statistical Mean @25°C Maximum: Mean (Worst-Case Temp) + 3σ (-40°C to 125°C) 3.0 3.5 4.0 V (V) DD 4.5 5.0 5.5 4.5 5.0 5.5 © 2007 Microchip Technology Inc. ...
Page 103
... Microchip Technology Inc. PIC12F510/16F506 = 3.0V) DD (VDD = 3V, -40×C TO 125×C) Max. 125°C Max. 85°C Typical 25°C Min. -40°C 6.5 7.0 7.5 8.0 8 ...
Page 104
... DS41268D-page 102 = 3.0V) DD -1.5 -2.0 -2.5 I (mA 5.0V -1.5 -2.0 -2.5 -3.0 -3.5 I (mA) OH Max. -40°C Typ. 25°C Min. 125°C -3.0 -3.5 -4.0 Max. -40°C Typ. 25°C Min. 125°C -4.0 -4.5 -5.0 © 2007 Microchip Technology Inc. ...
Page 105
... Typical: Statistical Mean @25°C 3.5 Maximum: Mean (Worst-Case Temp) + 3σ (-40°C to 125°C) 3.0 2.5 2.0 1.5 1.0 0.5 2.0 2.5 © 2007 Microchip Technology Inc. PIC12F510/16F506 vs (TTL Input, -40×C TO 125×C) Max. -40°C Typ. 25°C Min. 125°C 3.0 3.5 4.0 ...
Page 106
... DEVICE RESET TIMER (HS, XT AND LP) vs 2.0 2.5 Note: See Table 13-7 if another clock mode is selected. DS41268D-page 104 DD Maximum (Sleep Mode all Peripherals Disabled) Max. 125°C Max. 85°C Typical 25°C Min. -40°C 3.0 3.5 4.0 V (V) DD 4.5 5.0 5.5 © 2007 Microchip Technology Inc. ...
Page 107
... Microchip part number, year code, week code and traceability code. For PIC device marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. For QTP devices, any special marking adders are included in QTP price. © 2007 Microchip Technology Inc. PIC12F510/16F506 Example ...
Page 108
... PIC12F510/16F506 15.2 Package Marking Information (Cont’d) 14-Lead SOIC (3.90 mm) XXXXXXXXXXX XXXXXXXXXXX YYWWNNN 8-Lead MSOP XXXXXX YWWNNN 14-Lead TSSOP (4.4 mm) XXXXXXXX YYWW NNN DS41268D-page 106 Example PIC16F506 -I/SL 0410017 Example 602/MS 310017 Example 16F506/ST 0410 017 © 2007 Microchip Technology Inc. ...
Page 109
... N NOTE © 2007 Microchip Technology Inc. PIC12F510/16F506 DS41268D-page 107 ...
Page 110
... PIC12F510/16F506 N NOTE DS41268D-page 108 © 2007 Microchip Technology Inc. ...
Page 111
... N NOTE © 2007 Microchip Technology Inc. PIC12F510/16F506 φ α c β DS41268D-page 109 ...
Page 112
... PIC12F510/16F506 DS41268D-page 110 © 2007 Microchip Technology Inc. ...
Page 113
... D N NOTE TOP VIEW A3 © 2007 Microchip Technology Inc. PIC12F510/16F506 EXPOSED PAD BOTTOM VIEW A NOTE NOTE DS41268D-page 111 ...
Page 114
... PIC12F510/16F506 N NOTE DS41268D-page 112 φ α c β © 2007 Microchip Technology Inc. ...
Page 115
... D N NOTE © 2007 Microchip Technology Inc. PIC12F510/16F506 φ L DS41268D-page 113 ...
Page 116
... PIC12F510/16F506 D N NOTE DS41268D-page 114 © 2007 Microchip Technology Inc. φ L ...
Page 117
... Revised Table 1-1; Table 4-1, Table 4-2; Figure 4-5; Register 7-1 (Note 1); Register 8-1; Figure 13-4; 13.1 - 13.3; Table 13-1, Table 13-3, Table 13-6, Table 13-7, Table 13-9; Figure 14-4, Figure 14-14; Section 14.0; Packaging; Product ID System. © 2007 Microchip Technology Inc. PIC12F510/16F506 DS41268D-page 115 ...
Page 118
... PIC12F510/16F506 NOTES: DS41268D-page 116 © 2007 Microchip Technology Inc. ...
Page 119
... INDF.................................................................................... 24 Indirect Data Addressing..................................................... 24 Instruction Cycle ................................................................. 14 Instruction Flow/Pipelining .................................................. 14 Instruction Set Summary..................................................... 72 Internet Address................................................................ 108 L Loading of PC ..................................................................... 23 © 2007 Microchip Technology Inc. PIC12F510/16F506 M Memory Organization ......................................................... 15 Data Memory .............................................................. 16 Program Memory (PIC12F510/16F506) ..................... 15 Microchip Internet Web Site.............................................. 108 MPLAB ASM30 Assembler, Linker, Librarian ..................... 80 MPLAB ICD 2 In-Circuit Debugger ..................................... 81 MPLAB ICE 2000 High-Performance Universal In-Circuit Emulator ...
Page 120
... TMR0 with External Clock........................................... 41 Timing Diagrams and Specifications................................... 91 Timing Parameter Symbology and Load Conditions........... 91 TRIS Registers.................................................................... 27 W Wake-up from Sleep ........................................................... 69 Watchdog Timer (WDT) ................................................ 55, 66 Period.......................................................................... 66 Programming Considerations ..................................... 66 WWW Address.................................................................. 108 WWW, On-Line Support........................................................ 3 Z Zero bit .................................................................................. 9 DS41268D-page 118 © 2007 Microchip Technology Inc. ...
Page 121
... To register, access the Microchip web site at www.microchip.com, click on Customer Change Notification and follow the registration instructions. © 2007 Microchip Technology Inc. PIC12F510/16F506 CUSTOMER SUPPORT Users of Microchip products can receive assistance through several channels: • ...
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... What deletions from the document could be made without affecting the overall usefulness there any incorrect or misleading information (what and where)? 7. How would you improve this document? DS41268D-page 120 Total Pages Sent ________ FAX: (______) _________ - _________ N Literature Number: DS41268D © 2007 Microchip Technology Inc. ...
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... To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office PART NO. X /XX Device Temperature Package Range Device: PIC16F506 PIC12F510 (1) PIC16F506T (2) PIC12F510T V range 2.0V to 5.5V DD Temperature I = -40°C to +85°C Range -40°C to +125°C Package DFN 2x3 (DUAL Flatpack No-Leads) ...
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... Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2007 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...