PIC16F87-E/P Microchip Technology, PIC16F87-E/P Datasheet - Page 22

• Manufacturer Part Number: PIC16F87-E/P
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,DIP,18PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F87-E/P

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 368 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 18-DIP (0.300", 7.62mm)
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 368 B
• Interface Type: SSP, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014
• Minimum Operating Temperature: - 40 C
• Data Rom Size: 256 B
• Height: 3.3 mm
• Length: 22.86 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4 V
• Width: 6.35 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ACICE0202 - ADAPTER MPLABICE 18P 300 MIL
• Data Converters: -
• Lead Free Status / Rohs Status: Details

PIC16F87/88
2.2.2.4
This register contains the individual enable bits for the
peripheral interrupts.
REGISTER 2-4:
DS30487C-page 20
Note:
Bit PEIE (INTCON<6>) must be set to
enable any peripheral interrupt.
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
PIE1 Register
PIE1: PERIPHERAL INTERRUPT ENABLE REGISTER 1 (ADDRESS 8Ch)
bit 7
Unimplemented: Read as ‘0’
ADIE: A/D Converter Interrupt Enable bit
1 = Enabled
0 = Disabled
RCIE: AUSART Receive Interrupt Enable bit
1 = Enabled
0 = Disabled
TXIE: AUSART Transmit Interrupt Enable bit
1 = Enabled
0 = Disabled
SSPIE: Synchronous Serial Port (SSP) Interrupt Enable bit
1 = Enabled
0 = Disabled
CCP1IE: CCP1 Interrupt Enable bit
1 = Enabled
0 = Disabled
TMR2IE: TMR2 to PR2 Match Interrupt Enable bit
1 = Enabled
0 = Disabled
TMR1IE: TMR1 Overflow Interrupt Enable bit
1 = Enabled
0 = Disabled
Legend:
R = Readable bit
-n = Value at POR
Note 1: This bit is only implemented on the PIC16F88. The bit will read ‘0’ on the PIC16F87.
U-0
—
ADIE
R/W-0
(1)
R/W-0
RCIE
W = Writable bit
‘1’ = Bit is set
R/W-0
TXIE
(1)
SSPIE
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CCP1IE
R/W-0
 2005 Microchip Technology Inc.
TMR2IE
x = Bit is unknown
R/W-0
TMR1IE
R/W-0
bit 0