PIC18F4580-I/ML Microchip Technology, PIC18F4580-I/ML Datasheet

IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,44PIN,PLASTIC

PIC18F4580-I/ML

Manufacturer Part Number

PIC18F4580-I/ML

Description

IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,44PIN,PLASTIC

Manufacturer

Microchip Technology

Series

PIC® 18Fr

Datasheets

1.PIC16F616T-ISL.pdf (8 pages)

2.PIC18F2221-ISO.pdf (46 pages)

3.PIC18F4480-IPT.pdf (490 pages)

4.PIC18F4480-IPT.pdf (8 pages)

5.PIC18F4480-IPT.pdf (6 pages)

6.PIC18F4480-IPT.pdf (6 pages)

Specifications of PIC18F4580-I/ML

Rohs Compliant

YES

Core Processor

PIC

Core Size

8-Bit

Speed

40MHz

Connectivity

CAN, I²C, SPI, UART/USART

Peripherals

Brown-out Detect/Reset, HLVD, POR, PWM, WDT

Number Of I /o

Program Memory Size

32KB (16K x 16)

Program Memory Type

FLASH

Eeprom Size

256 x 8

Ram Size

1.5K x 8

Voltage - Supply (vcc/vdd)

4.2 V ~ 5.5 V

Data Converters

A/D 11x10b

Oscillator Type

Internal

Operating Temperature

-40°C ~ 85°C

Package / Case

44-QFN

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

For Use With

XLT44QFN2 - SOCKET TRAN ICE 44QFN/40DIPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN444-1001 - DEMO BOARD FOR PICMICRO MCU

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

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The PIC18F2480/2580/4480/4580 Rev. A1 parts you

have received conform functionally to the Device Data

Sheet

described below. Any Data Sheet Clarification issues

related to the PIC18F2480/2580/4480/4580 will be

reported in a separate Data Sheet errata. Please check

the Microchip web site for any existing issues.

All of the issues listed here will be addressed in future

revisions of the PIC18F2480/2580/4480/4580 silicon.

The

PIC18F2480/2580/4480/4580 devices with these

Device/Revision IDs:

1. Module: ECCP

The Device IDs (DEVID1 and DEVID2) are located at

addresses

configuration space. They are shown in hexadecimal

in the format “DEVID2 DEVID1”.

Part Number

PIC18F2480

PIC18F2580

PIC18F4480

PIC18F4580

When operating either Timer1 or Timer3 as a

counter with a prescale value other than 1:1 and

operating the ECCP in Compare mode with the

Special

CCP1M3:CCP1M0 = 1011), the Special Event

Trigger Reset of the timer occurs as soon as there

CCPR1H:CCPR1L.

This differs from the PIC18F458, where the Special

Event Trigger Reset of the timer occurs on the next

rollover of the prescale counter, after the match

between TMRxH:TMRxL and CCPR1H:CCPR1L.

Work around

To achieve the same timer Reset period on the

PIC18F4580 family as the PIC18F458 family for a

given clock source, add 1 to the value in

CCPR1H:CCPR1L.

CCPR1H:CCPR1L = x for the PIC18F458, to

achieve the same Reset period on the PIC18F4580

family,

prescale is 1, 2, 4 or 8 (depending on the

T1CKPS1:T1CKPS0 bit values).

Date Codes that pertain to this issue:

All engineering and production devices.

following

(DS39637C),

PIC18F2480/2580/4480/4580 Rev. A1 Silicon Errata

match

CCPR1H:CCPR1L = x + 1,

3FFFFEh:3FFFFFh

Event

silicon

01 1010 100

01 1010 101

01 1010 100

01 1010 110

between

Device ID

except

Trigger

errata apply

TMRxH:TMRxL

for

other

(CCP1CON

the

Revision ID

the

00001

words,

where

anomalies

PIC18F2480/2580/4480/4580

only

device’s

bits,

and

the

2. Module: EUSART

3. Module: Timer1/Timer3

When performing back-to-back transmission in

9-bit mode (TX9D bit in the TXSTA register is

set), an ongoing transmission’s timing can be

corrupted if the TX9D bit (for the next transmis-

sion) is not written immediately following the

setting of TXIF. This is because any write to the

TXSTA register results in a reset of the Baud

Rate Generator which will effect any ongoing

transmission.

Work around

Load TX9D just after TXIF is set, either by polling

TXIF or by writing TX9D at the beginning of the

Interrupt Service Routine, or only write to TX9D

when

(TRMT = 1).

Date Codes that pertain to this issue:

All engineering and production devices.

When Timer1/Timer3 is operating in 16-bit mode

and the prescale setting is not 1:1, a write to the

TMR1H/TMR3H Buffer registers may lengthen the

duration of the period between the increments of

the timer for the period in which TMR1H/TMR3H

was written. It does not change the actual prescale

value.

Work around

Do not write to TMR1H/TMR3H while Timer1/

Timer3 is running, or else write to TMR1L/TMR3L

immediately following a write to TMR1H/TMR3H.

Do not write to TMR1H/TMR3H and then wait for

another event before also updating TMR1L/

TMR3L.

Date Codes that pertain to this issue:

All engineering and production devices.

transmission

not

DS80219E-page 1

progress

Related parts for PIC18F4580-I/ML

PIC18F4580-I/ML Summary of contents

Page 1

... PIC18F4580 family as the PIC18F458 family for a given clock source, add 1 to the value in CCPR1H:CCPR1L. In other CCPR1H:CCPR1L = x for the PIC18F458, to achieve the same Reset period on the PIC18F4580 family, CCPR1H:CCPR1L = prescale (depending on the T1CKPS1:T1CKPS0 bit values). Date Codes that pertain to this issue: All engineering and production devices. ...

Page 2

... MOVFF TEMP, BSR. As another alternative, the following work around shown in Example 1 can be used. This example overwrites the Fast Return register by making a dummy call to Foo with the fast option in the high priority service routine. C18 C Compiler, This TEMP, W BSR © 2007 Microchip Technology Inc. ...

Page 3

... CALL high_vector_branch, 1 _endasm } void high_vector_branch (void) { _asm POP GOTO high_isr _endasm } #pragma interrupt high_isr void high_isr (void) { ... } © 2007 Microchip Technology Inc. PIC18F2480/2580/4480/4580 Date Codes that pertain to this issue: All engineering and production devices. DS80219E-page 3 ...

Page 4

... Date Codes that pertain to this issue: All engineering and production devices. // Has an overflow occurred transmission pending? // Clear transmit request // Store transmission aborted status value // Read receive buffer // Was previous transmission aborted? // Set transmit request // Reset stored transmission aborted status © 2007 Microchip Technology Inc. ...

Page 5

... Place the ECAN module in Configuration mode before receiving 129 consecutive error frames, and then place it back into Listen Only mode. Date Codes that pertain to this issue: All engineering and production devices. © 2007 Microchip Technology Inc. PIC18F2480/2580/4480/4580 11. Module: 10-Bit Analog-to-Digital Converter When the AD clock source is selected ...

Page 6

... Correct silicon issue 5 (ECAN™ Technology). Cor- rected code comment in Example 4 for silicon issue 8 (ECAN™ Technology). Rev D Document (4/2007) Added silicon issue 10 (ECAN™ Technology). Rev E Document (5/2007) Added silicon issue 11 (10-Bit Analog-to-Digital Converter). DS80219E-page 6 © 2007 Microchip Technology Inc. ...

Page 7

... PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 8

... Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2007 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...

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