ADNS-5020 Avago Technologies US Inc., ADNS-5020 Datasheet - Page 13

• Manufacturer Part Number: ADNS-5020
• Description: Optoelectronic Miscellaneous, Other
• Manufacturer: Avago Technologies US Inc.

Specifications of ADNS-5020

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SCLK
SCLK
Required Timing between Read and Write Commands
There are minimum timing requirements between read and write
commands on the serial port.
If the rising edge of SCLK for the last address bit of the read command occurs
before the required delay (t
correctly.
SCLK
During a read operation SCLK should be delayed at least t
address data bit to ensure that the ADNS-5020 has time to prepare the
requested data. The falling edge of SCLK for the first address bit of either the
read or write command must be at least t
edge of the last data bit of the previous read operation.
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If the rising edge of the SCLK for the last data bit of the second write
command occurs before the required delay (t
command may not complete correctly.
ADDRESS
ADDRESS
ADDRESS
WRITE OPERATION
WRITE OPERATION
Timing between Read and Either Write or Subsequent Read Commands
SWR
Timing between Write and Read Commands
), the write command may not complete
Timing between Two Write Commands
DATA
DATA
SRR
or t
SRW
SWW
after the last SCLK rising
READ OPERATION
), then the first write
t
SRAD
SRAD
after the last
ADDRESS
t
t
SWW
SWR
WRITE OPERATION
NEXT READ OPERATION
DATA
ADDRESS
DATA
t
SRW
or WRITE OPERATION
& t
SRR
NEXT READ
ADDRESS
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