ADNS-5020 Avago Technologies US Inc., ADNS-5020 Datasheet - Page 9

• Manufacturer Part Number: ADNS-5020
• Description: Optoelectronic Miscellaneous, Other
• Manufacturer: Avago Technologies US Inc.

Specifications of ADNS-5020

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 9. Distance from lens reference plane to tracking surface (Z).
AC Electrical Specifications
Electrical Characteristics over recommended operating conditions. Typical values at 25 C, V
Parameter
Reset Pulse Width
Motion Delay after Reset
SDIO Rise Time
SDIO Fall Time
SDIO delay after SCLK
SDIO Hold Time
SDIO Setup Time
SPI Time between Write Commands
SPI Time between Write
and Read Commands
SPI Time between Read
and Subsequent Commands
SPI Read Address-Data Delay
NCS Inactive after Motion Burst
NCS to SCLK Active
SCLK to NCS Inactive
(for read operation)
SCLK to NCS Inactive
(for write operation)
NCS to SDIO High-Z
Transient Supply Current
9
Z =
(0.094)
2.40
SENSOR
OBJECT SURFACE
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
I
RESET
MOT-RST
r-SDIO
f-SDIO
DLY-SDIO
hold-SDIO
setup-SDIO
SWW
SWR
SRW
SRR
SRAD
BEXIT
NCS-SCLK
SCLK-NCS
SCLK-NCS
NCS-SDIO
DDT
Minimum Typical
250
0.5
30
20
500
4
250
120
120
20
120
150
150
LENS
Maximum Units
50
300
300
120
1/f
500
60
LENS REFERENCE PLANE
SCLK
DD
= 5.0 V.
ns
ms
ns
ns
ns
us
ns
ns
ns
ns
ns
us
ns
mA
s
s
s
Notes
Active low.
From NRESET pull high to valid motion,
assuming V
C
C
From SCLK falling edge to SDIO data
valid, no load conditions.
Data held until next falling SCLK edge.
From data valid to SCLK rising edge.
From rising SCLK for last bit of the first
data byte, to rising SCLK for last bit of
the second data byte.
From rising SCLK for last bit of the first
data byte, to rising SCLK for last bit of
the second address byte.
From rising SCLK for last bit of the first
data byte, to falling SCLK for the first
bit of the next address.
From rising SCLK for last bit of the
address byte, to falling SCLK for first bit
of data being read.
Minimum NCS inactive time after
motion burst before next SPI usage.
From NCS falling edge to first SCLK
rising edge.
From last SCLK rising edge to NCS
rising edge, for valid SDIO data transfer.
From last SCLK rising edge to NCS
rising edge, for valid SDIO data transfer.
From NCS rising edge to SDIO high-Z state.
Max supply current during a V
from 0 to V
L
L
= 100pF
= 100pF
DD
DD
.
and motion is present.
DD
ramp