AD9547/PCBZ Analog Devices Inc, AD9547/PCBZ Datasheet - Page 50

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AD9547/PCBZ

Manufacturer Part Number
AD9547/PCBZ
Description
Clock Generator/Synchronizer Evaluation Board
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9547/PCBZ

Silicon Manufacturer
Analog Devices
Application Sub Type
Network Clock Generator/Synchronizer
Kit Application Type
Clock & Timing
Silicon Core Number
AD9547
Main Purpose
Timing, Clock Generator
Embedded
No
Utilized Ic / Part
AD9547
Primary Attributes
2 Differential or 4 Single Ended Inputs
Secondary Attributes
CMOS, LVPECL & LVDS Compatible
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AD9547
SERIAL CONTROL PORT
The AD9547 serial control port is a flexible, synchronous serial
communications port that provides a convenient interface to many
industry-standard microcontrollers and microprocessors. The
AD9547 serial control port is compatible with most synchronous
transfer formats, including Philips I2C, Motorola® SPI, and
Intel® SSR protocols. The serial control port allows read/write
access to the AD9547 register map.
In SPI mode, single or multiple byte transfers are supported.
The SPI port configuration is programmable via Register 0x0000.
This register is integrated into the SPI control logic rather than
the register map and is distinct from the I
It is also inaccessible to the EEPROM controller.
A functional diagram of the serial control port, including its
relationship to the EEPROM, appears in Figure 49.
Although the AD9547 supports both the SPI and I
protocols, only one is active following power-up (as determined
by the multifunction pins, M0 to M2, during the startup sequence).
That is, the only way to change the serial port protocol is to reset
the device (or cycle the device power supply). Both protocols
use a common set of control pins as shown in Figure 50.
SCLK/SCL
CS/SDA
Figure 50. Serial Control Port
SDIO
SDO
SCLK/SCL
2
3
4
5
CS/SDA
SDIO
SDO
AD9547
CONTROL
SERIAL
PORT
EEPROM
2
C Register 0x0000.
SERIAL CONTROL ARBITER
2
C serial port
CONTROLLER
Figure 49. Serial Port Functional Diagram
SPI
I
EEPROM
2
C
400kHz
Rev. B | Page 50 of 104
13-BIT ADDRESS
READ/WRITE
SPI/I
Because the AD9547 supports both the SPI and I2C protocols,
the active serial port protocol depends on the logic state of the
three multifunction pins, M0 to M2, at startup. If all three pins
are set to Logic 0 at startup, the SPI protocol is active. Otherwise,
the I2C protocol is active with seven different I2C slave address
settings that are based on the startup logic pattern on the M0 to
M2 pins (see Table 29). Note that the four MSBs of the slave
address are hardware coded as 1001.
Table 29. Serial Port Mode Selection
M2
0
0
0
0
1
1
1
1
SPI SERIAL PORT OPERATION
Pin Descriptions
The SCLK (serial clock) pin (SCLK/SCL) serves as the serial
shift clock. This pin is an input. SCLK synchronizes serial
control port read and write operations. The rising edge SCLK
registers write data bits, and the falling edge registers read data
bits. The SCLK pin supports a maximum clock rate of 40 MHz.
The SDIO (serial data input/output) pin is a dual-purpose pin
and acts either as an input only (unidirectional mode) or as both
an input and an output (bidirectional mode). The AD9547
default SPI mode is bidirectional.
The SDO (serial data out) pin is useful only in unidirectional
I/O mode. It serves as the data output pin for read operations.
The CS (chip select) pin ( CS /SDA) is an active low control that
gates read and write operations. This pin is internally connected
to a 30 kΩ pull-up resistor. When CS is high, the SDO and
SDIO pins go into a high impedance state.
READ-ONLY
REGION
REGION
SPACE
ANALOG BLOCKS AND
POWER-ON RESET
2
DIGITAL CORE
C PORT SELECTION
M1
0
0
1
1
0
0
1
1
PIN CONTROL
FUNCTION
MULTI-
M0
0
1
0
1
0
1
0
1
LOGIC
Serial Port Mode
SPI
I²C (address = 1001001)
I²C (address = 1001010)
I²C (address = 1001011)
I²C (address = 1001100)
I²C (address = 1001101)
I²C (address = 1001110)
I²C (address = 1001111)
M7
M6
M5
M4
M3
M2
M1
M0

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