CSM-12C32 AXIOM, CSM-12C32 Datasheet - Page 12

• Manufacturer Part Number: CSM-12C32
• Description: MCU MODULE
• Manufacturer: AXIOM

Specifications of CSM-12C32

• Silicon Manufacturer: Freescale
• Core Architecture: HCS12
• Core Sub-architecture: S12C
• Features: Power Selection Jumper, Analog Comparator, SCI/SPI Communications Ports
• Kit Contents: Board, Cables, CD, Power Supply
• Silicon Core Number: MC9S12C32
• Silicon Family Name: S12C

C S M 1 2 C 3 2
U S E R
GO [<Address>]
HELP
LOAD [P]
MD <StartAddress> [<EndAddress>]
MM <Address>
MW <Address>
MOVE <StartAddress> <EndAddress>
<DestAddress>
RD
OFFSET – [arg]
Proceed
RM
STOPAT <Address>
T [<count>]
Interrupt Support
All interrupt services under are provided through the relocated vector table, see Table 5 below.
Each location in the table is initialized to a value of $0000 to cause the trap of an unscheduled
interrupt. Any nonzero value will allow the interrupt to proceed to the user's service routine
that should be located at the address indicated. The interrupt service delay is +21 cycles over
the standard interrupt service.
To use vectors specified in the table, the user must insert the address of the interrupt service
routine during software initialization into the ram interrupt table. For an example, for the IRQ
vector, the following is performed:
Example:
Place IRQ service routine address in the table:
This vector initialization will remain in effect until a RESET is invoked.
Interrupt Vector Table
Table 5: MON12 Interrupt Vector Table
Ram Interrupt Vector
Address
0F8A
0F8C
0F8E
0F90
NOTE: Items in Italics are not implemented at this time.
G U I D E
IRQ Service routine label = IRQ_SRV
Ram Vector Table address is defined in table below, IRQ vector definition:
VIRQ EQU $0FF2 ; define ram table vector location
MOVW
#IRQ_SRV,VIRQ
MCU Interrupt Vector
Address
FF8A
FF8C
FF8E
FF90
12
Begin/continue execution of user code
Display the Mon12 command summary
Load S-Records into memory, P = Paged S2
Memory Display Bytes
Modify Memory Bytes (8 bit values)
Modify memory Words (16 bit values)
Move a block of memory
Display all CPU registers
Offset for download
Continue program execution
Modify CPU Register Contents
Trace until address
Trace <count> instructions
TRAP code
02
04
06
08
Vector
Source
LVI
PWME
PTPI
C4TX
A U G U S T
1 ,
2 0 0 8