NCP1607BDR2G ON Semiconductor, NCP1607BDR2G Datasheet - Page 12

IC PFC CONTROLLER CRM 8SOIC

NCP1607BDR2G

Manufacturer Part Number
NCP1607BDR2G
Description
IC PFC CONTROLLER CRM 8SOIC
Manufacturer
ON Semiconductor
Datasheet

Specifications of NCP1607BDR2G

Mode
Critical Conduction (CRM)
Current - Startup
23.5µA
Voltage - Supply
9.5 V ~ 20 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (0.154", 3.90mm Width)
Switching Frequency
70 KHz
Maximum Power Dissipation
450 mW
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Frequency - Switching
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Manufacturer
Quantity
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NCP1607BDR2G
Manufacturer:
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Part Number:
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Quantity:
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Control pins to reduce the speed at which the EA responds
to changes in the boost output. This is necessary due to the
nature of an active PFC circuit. The PFC stage absorbs a
sinusoidal current from a sinusoidal line voltage. Hence,
the converter provides the load with a power that matches
the average demand only. Therefore, the output capacitor
must “absorb” the difference between the delivered power
a frequency of either 100 Hz (for 50 Hz mains such as in
Europe) or 120 Hz (for 60 Hz mains in the USA). This
ripple must not be taken into account by the regulation loop
because the error amplifier’s output voltage must be kept
constant over a given ac line cycle for a proper shaping of
the line current. Due to this constraint, the regulation
bandwidth is typically set below 20 Hz. For a simple type 1
compensation network, only a capacitor is placed between
FB and Control (see Figure 1). In this configuration, the
capacitor necessary to attenuate the bulk voltage ripple is
given by:
where G is the attenuation level in dB (commonly 60 dB)
ON TIME SEQUENCE
converter, its switching pattern must accommodate
constant on times and variable off times. The Controller
generates the on time via an external capacitor connected
to pin 3 (Ct). A current source charges this capacitor to a
level determined by the Control pin voltage. Specifically,
Ct is charged to V
typical). Once this level is exceeded, the drive is turned off
(Figure 27).
A compensation network is placed between the FB and
As a consequence, the output voltage exhibits a ripple at
Since the NCP1607 is designed to control a CRM boost
C
COMP
CONTROL
+
4 @ p f
Figure 26. Output Voltage Ripple for a Constant Output Power
minus the V
line
10
P
V
IN
20
@ R
OUT
G
OUT1
P
OUT
EAL
Vac
offset (2.1 V
Iac
http://onsemi.com
(eq. 4)
12
and the power consumed by the load. This means that when
the power fed to the load is lower than the demand, the
output capacitor discharges to compensate for the lack of
power. Alternatively, when the supplied power is higher
than that absorbed by the load, the output capacitor charges
to store the excess energy. The situation is depicted in
Figure 26.
output load, this naturally satisfies equation 1. And if the
values of compensation components are sufficient to filter
Since V
Control
Ct
CONTROL
Figure 27. On Time Generation
V
DD
I
V
CHARGE
varies with the RMS line level and
Ct(off)
DRV
DRV
V
CONTROL
V
V
Ct
CONTROL
t
on
V
+
EAL
− V
PWM
+
EAL
t
on

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