NCP1607BDR2G ON Semiconductor, NCP1607BDR2G Datasheet - Page 14

IC PFC CONTROLLER CRM 8SOIC

NCP1607BDR2G

Manufacturer Part Number
NCP1607BDR2G
Description
IC PFC CONTROLLER CRM 8SOIC
Manufacturer
ON Semiconductor
Datasheet

Specifications of NCP1607BDR2G

Mode
Critical Conduction (CRM)
Current - Startup
23.5µA
Voltage - Supply
9.5 V ~ 20 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (0.154", 3.90mm Width)
Switching Frequency
70 KHz
Maximum Power Dissipation
450 mW
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Frequency - Switching
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Manufacturer
Quantity
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Manufacturer:
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Part Number:
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Quantity:
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internally clamped to V
ZCD winding is negative. Similarly, the ZCD pin is
clamped to V
too high. Because of these clamps, a resistor (R
Figure 29) is necessary to limit the current from the ZCD
winding to the ZCD pin.
therefore no voltage signal to activate the ZCD
comparators. This means that the driver could never turn
on. Therefore, to enable the PFC stage to startup under
these conditions, an internal watchdog timer is integrated
into the controller. This timer turns the drive on if the driver
has been off for more than 180 ms (typical). This feature is
deactivated during a fault mode (OVP, UVP, or Shutdown),
and reactivated when the fault is removed.
STARTUP
V
(12 V typical). Because of the very low consumption of the
NCP1607 during this stage (< 40 mA), most of the current
goes directly to charging up the V
provides faster startup times and reduced standby power
dissipation. When the V
QUICK START and SOFT START
pulled up to V
of control voltage which produces output drives. This
feature, called “quick start,” eliminates the delay at startup
CC
To prevent negative voltages on the ZCD pin, the pin is
At startup, there is no energy in the ZCD winding and
Generally, a resistor connected between the ac input and
At startup, the error amplifier is enabled and Control is
(pin 8) charges the V
1
2
3
4
CL(POS)
EAL
(2.1 V typical). This is the lowest level
(5.7 V typical), when the voltage rises
Figure 31. NCP1607 Supplied by a Downstream SMPS Controller (NCP1230)
8
7
6
5
CL(NEG)
CC
CC
PFC_V
+
capacitor to the V
voltage exceeds the V
(600 mV typical) when the
CC
CC
1
2
3
4
NCP1230
D
capacitor. This
BOOST
CC(on)
8
7
6
5
ZCD
http://onsemi.com
CC(on)
V
level
CC
+
in
+
14
C
level, the internal references and logic of the NCP1607 turn
on. The controller has an undervoltage lockout (UVLO)
feature which keeps the part active until V
V
for the auxiliary winding to take over and supply the
necessary power to V
power supply (SMPS), then it is often preferable to have the
SMPS controller startup first. The SMPS can then supply
the NCP1607 V
the NCP1230 or NCP1381, can control when to turn on the
PFC stage (see Figure 31) leading to optimal system
performance. This setup also eliminates the startup
resistors and therefore improves the no load power
dissipation of the system.
BULK
associated with charging the compensation network to its
minimum level. This also produces a natural “soft−start”
mode where the controller’s power ramps up from zero to
the required power (see Figure 32).
V
V
CC(off)
CC(on)
CC(off)
When the PFC pre−converter is loaded by a switch mode
Figure 30. Typical V
(9.5 V typical). This hysteresis allows ample time
V
CC
CC
directly. Advanced controllers, such as
+
CC
(Figure 30).
CC
Startup Waveform
+
CC
drops below

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