MAX98400AEVKIT+ Maxim Integrated Products, MAX98400AEVKIT+ Datasheet - Page 19

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MAX98400AEVKIT+

Manufacturer Part Number
MAX98400AEVKIT+
Description
Audio Modules & Development Tools MAX98400A KIT MAX98400A KIT
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX98400AEVKIT+

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Some applications use the ICs with a full inductor-/
capacitor-based (L/C) output filter. See Figure 4 for the
correct connections of these components.
The load impedance of the speaker determines the filter
component selection (Table 3).
Inductors L1 and L2 and capacitor C1 form the primary
output filter. Capacitors C2 and C3 provide common-
mode filtering to reduce radiated emissions. Capacitors
C4 and C5, plus resistors R1 and R2, form a Zobel at
the output. A Zobel corrects the output loading to com-
pensate for the rising impedance of the loudspeaker.
Without a Zobel, the filter exhibits a peak response near
the cutoff frequency.
The input AC-coupling capacitors allow the amplifier to
automatically bias the signal to an optimum DC level.
1FF is recommended for the input capacitor.
The ICs are designed to be operated from a single-
supply voltage, V
Inside the ICs, this V
FETs and other high-power circuitry, while the low-power
circuitry operates from V
supply (4.6V typ). V
ear regulator that is powered from V
PVDD and V
Table 3. Filter Component Selection
Figure 4. Output Filter for PWM Mode
R
L
16
MAX98400A/B
4
8
(I)
S
pins to ground with a 1FF capacitor.
PVDD
Inductor-Based Output Filters
S
PVDD
Stereo, High-Power, Class D Amplifiers
is internally generated from a lin-
, which can range from 8V to 28V.
L1, L2 (µh)
L1
L2
S
supplies power for the output
, an internally generated 5V
10
15
33
Component Selection
C3
C1
C2
PVDD
Power Supplies
Input Capacitor
R2
C5
. Bypass both
R1
C4
C1 (µF)
0.47
0.15
0.10
For highest efficiency operation and best thermal perfor-
mance, especially at higher V
supplied from an external 5V supply. To do this, connect
a 5V source to the V
supply is connected to the V
is automatically disabled and the power dissipation of
the ICs is reduced.
Proper layout and grounding are essential for optimum
performance. Use wide traces for the power-supply
inputs and amplifier outputs to minimize losses due to
parasitic trace resistance. Proper grounding improves
audio performance, minimizes crosstalk between chan-
nels, and prevents switching noise from coupling into
the audio signal. Connect PGND and GND together at
a single point on the PCB. Route all traces that carry
switching transients away from GND and the traces/
components in the audio signal path.
Bypass each PVDD pin with a 0.1FF capacitor to PGND.
Place the bypass capacitors as close as possible to the
ICs. Place a 220FF capacitor between PVDD and PGND.
Bypass both PVDD and V
GND.
Use wide, low-resistance output traces. Current drawn
from the outputs increases as load impedance decreas-
es. High-output trace resistance decreases the power
delivered to the load. The TQFN package features an
exposed thermal pad on its underside. This pad lowers
the package’s thermal resistance by providing a heat
conduction path from the die to the PCB. Connect the
exposed thermal pad to PGND by using a large pad and
multiple vias to the PGND plane.
For best optimum thermal performance, use 2oz copper
and allow lots of PCB area around the device.
PROCESS: CMOS
C2, C3 (µF)
Supply Bypassing, Layout, and Grounding
0.10
0.15
0.10
C4, C5 (µF)
S
pin (4.75V to 5.5V). When a 5V
0.22
0.15
0.10
S
pins with a 1FF capacitor to
Chip Information
S
PVDD
pin, the internal regulator
Internal Regulator V
levels, the V
R1, R2 (I)
10
15
33
S
can be
19
S

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