AD7298-1BCPZ Analog Devices Inc, AD7298-1BCPZ Datasheet - Page 19

8Channel 10Bit SAR

AD7298-1BCPZ

Manufacturer Part Number
AD7298-1BCPZ
Description
8Channel 10Bit SAR
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD7298-1BCPZ

Number Of Bits
10
Sampling Rate (per Second)
1M
Data Interface
Serial, SPI™
Number Of Converters
1
Power Dissipation (max)
23mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
20-WFQFN, CSP Exposed Pad
Resolution (bits)
10bit
Sampling Rate
1MSPS
Input Channel Type
Single Ended
Supply Voltage Range - Analog
1.65V To 3.6V
Digital Ic Case Style
LFCSP
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD7298-1BCPZ
Manufacturer:
ADI
Quantity:
200
POWERING UP THE AD7298-1
The AD7298-1 contains a power-on reset circuit that sets the
control register to its default setting of all zeros; therefore, the
internal reference is enabled and the device is configured for the
normal mode of operation. At power-up, the internal reference is
by default enabled, which takes up to 6 ms (maximum) to power up.
If an external reference is being used, the user does not need to
wait for the internal reference to power up fully. The AD7298-1
digital interface is fully functional after 500 µs from the initial
power-up. Therefore, the user can write to the control register
after 500 µs to switch to external reference mode. The AD7298-1 is
then immediately ready to convert once the external reference is
available on the V
When supplies are first applied to the AD7298-1, the user must
wait the specified 500 µs before programming the control register
to select the desired channels for conversion.
REF
pin.
Rev. A | Page 19 of 24
RESET
The AD7298-1 includes a reset feature that can be used to reset
the device and the contents of all internal registers, including
the control register, to their default state.
To activate the reset operation, the PD / RST pin should be brought
low for no longer than 100 ns. It is asynchronous with the clock;
therefore, it can be triggered at any time. If the PD / RST pin is
held low for greater than 100 ns, the part enters full power-down
mode. It is imperative that the PD / RST pin be held at a stable
logic level at all times to ensure normal operation.
AD7298-1

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